Kerry Sheh ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/231
-gerrit commit 90cc2db57549d588e96b2d5490451bb0b51b13e5 Author: Kerry Sheh <[email protected]> Date: Thu Sep 22 18:56:46 2011 +0800 sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODE Add this option to enable/disable SATA IDE Combined Mode feature Change-Id: I1ab8acd27947a71baf954f44d0741f81f48e5541 Signed-off-by: Kerry Sheh <[email protected]> Signed-off-by: Kerry Sheh <[email protected]> --- src/southbridge/amd/cimx/sb800/Kconfig | 16 ++++++++++++++++ src/southbridge/amd/cimx/sb800/cfg.c | 2 +- 2 files changed, 17 insertions(+), 1 deletions(-) diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index dc4dd7a..1370e7e 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -28,6 +28,22 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/amd/cimx/sb800/bootblock.c" +config ENABLE_IDE_COMBINED_MODE + bool "Enable SATA IDE combined mode" + default n + help + If Combined Mode is enabled. IDE controller is exposed and + SATA controller has control over Port0 through Port3, + IDE controller has control over Port4 and Port5. + + If Combined Mode is disabled, IDE controller is hidden and + SATA controller has full control of all 6 Ports when operating in non-IDE mode. + +config IDE_COMBINED_MODE + hex + default "0x0" if ENABLE_IDE_COMBINED_MODE + default "0x1" if !ENABLE_IDE_COMBINED_MODE + choice prompt "SATA Mode" default SB800_SATA_IDE diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index a7801a8..a34dd14 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -84,7 +84,7 @@ void sb800_cimx_config(AMDSBCFG *sb_config) sb_config->SATAMODE.SataMode.SataController = SATA_CONTROLLER; sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0; //0 -IDE as primary, 1 -IDE as secondary. //TODO: set to secondary not take effect. - sb_config->SATAMODE.SataMode.SataIdeCombinedMode = 0; //IDE controlor exposed and combined mode enabled + sb_config->SATAMODE.SataMode.SataIdeCombinedMode = CONFIG_IDE_COMBINED_MODE; sb_config->SATAMODE.SataMode.SATARefClkSel = SATA_CLOCK_SOURCE; /* Azalia HDA */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
