On Thu, Oct 6, 2011 at 9:26 AM, Oskar Enoksson <[email protected]> wrote: > Oskar Enoksson ([email protected]) just uploaded a new patch set to gerrit, > which you can find at http://review.coreboot.org/238 > > -gerrit > > commit 1c4e003269ed43e3d46c60f56e62bcb1049a3fc0 > Author: Oskar Enoksson <[email protected]> > Date: Thu Oct 6 18:21:19 2011 +0200 > > Fixed broken MTRR for >4GB memory on AMD K8 fam 0fh rev <=E > > AMD K8 rev F and later implements a bit SYSCFG_MSR_TOM2WB in SYSCFG_MSR to > mark dram memory above 4GB as WB. However, AMD K8 > rev E and earlier don't implement this bit and therefore need > MTRR spanning dram memory above 4GB. The current implementation > of amd_setup_mtrrs never generate MTRR above 4GB. > This caused memory > 4GB not to be recognized in e.g. Linux on those > rev E or older platforms. This commit should fix that bug. > > Signed-off-by: Oskar Enoksson <[email protected]> > Change-Id: Ie568a52a8eb355969c86964d5afc4692e60f69c1 > --- > src/cpu/amd/mtrr/amd_mtrr.c | 18 +++++++++++++++--- > 1 files changed, 15 insertions(+), 3 deletions(-) > > diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c > index 623a344..93a3bba 100644 > --- a/src/cpu/amd/mtrr/amd_mtrr.c > +++ b/src/cpu/amd/mtrr/amd_mtrr.c > @@ -112,7 +112,13 @@ void amd_setup_mtrrs(void) > struct mem_state state; > unsigned long i; > msr_t msr, sys_cfg; > - > + // Test if this CPU is a Fam 0Fh rev. F or later > + const int is_revF = > + ((cpuid_eax(0x80000001)&0x00000f00)>>8 >= 0xf) || > + (((cpuid_eax(0x80000001)&0x00000f00)>>8 == 0xf) && > + ((cpuid_eax(0x80000001)&0x000f0000)>>16 >= 0x4)); > + if(is_revF) > + printk(BIOS_DEBUG, "Detected CPU Fam 0Fh rev.F or later\n");
should be configuration option instead of run-time checking. There is no MB that will support revE and revF at same time. they are different sockets Yinghai -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
