Idwer Vollering ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/415
-gerrit commit fb4e8e6babbe995dd7f82d7e3f9c056a26df86c9 Author: Idwer Vollering <[email protected]> Date: Sat Nov 5 20:02:29 2011 +0100 Refactor src/southbridge/intel/i82801ex/smbus.h Change-Id: I8be22f0292e322562b117f1e8bf493ed25eb4bec Signed-off-by: Idwer Vollering <[email protected]> --- src/southbridge/intel/i82801ex/early_smbus.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/src/southbridge/intel/i82801ex/early_smbus.c b/src/southbridge/intel/i82801ex/early_smbus.c index 37799a8..16b5e2a 100644 --- a/src/southbridge/intel/i82801ex/early_smbus.c +++ b/src/southbridge/intel/i82801ex/early_smbus.c @@ -7,7 +7,11 @@ static void enable_smbus(void) print_spew("SMBus controller enabled\n"); pci_write_config32(dev, SMB_BASE, SMBUS_IO_BASE | 1); - printk(BIOS_DEBUG, "SMB_BASE = 0x%x\n", pci_read_config32(dev, SMB_BASE)); + + print_debug("SMB_BASE = 0x"); + print_debug_hex32(pci_read_config32(dev, SMB_BASE)); + print_debug("\n"); + /* Set smbus enable */ pci_write_config8(dev, 0x40, 1); /* Set smbus iospace enable */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
