Nils Jacobs ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/528
-gerrit commit bf764d6ac76f1bca9da890af81ff5783d27c8c41 Author: Nils Jacobs <[email protected]> Date: Mon Jan 9 20:27:07 2012 +0100 Fix Geode GX2 + LX caching for tiny bootblock. Change-Id: If681a33deb7df752b37c6a8a20482d3c374af936 Signed-off-by: Nils Jacobs <[email protected]> --- src/cpu/amd/model_lx/msrinit.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/amd/model_lx/msrinit.c b/src/cpu/amd/model_lx/msrinit.c index 9c6e98e..1118250 100644 --- a/src/cpu/amd/model_lx/msrinit.c +++ b/src/cpu/amd/model_lx/msrinit.c @@ -22,10 +22,10 @@ static const msrinit_t msr_table[] = { - {CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB. + {CPU_RCONF_DEFAULT, {.hi = 0x24fffc00,.lo = 0x0000A000}}, /* Setup access to cache under 1MB. * Rom Properties: Write Serialize, WriteProtect. * RomBase: 0xFFFC0 - * SysTop to RomBase Properties: Write Serialize, Cache Disable. + * SysTop to RomBase Properties: Write Back. * SysTop: 0x000A0 * System Memory Properties: (Write Back) */ {CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
