Patrick Georgi ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/785
-gerrit commit 7f1e86895af6c3e092f4c45103970c0ff3677f80 Author: Patrick Georgi <[email protected]> Date: Sun Mar 11 20:15:21 2012 +0100 Don't wrap linker script wielding ld through $(CC) clang does its own thing when linking, somewhat incompatible to our linker magic. Change-Id: I243597adcb6bc3f7343c3431d7473610c327353d Signed-off-by: Patrick Georgi <[email protected]> --- src/arch/x86/Makefile.inc | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 250c077..4494e59 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -144,7 +144,7 @@ $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o + $(LD) -m elf_i386 -o $@ -L$(obj) $(obj)/coreboot_ram.o -T $(src)/arch/x86/coreboot_ram.ld $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug $(OBJCOPY) --strip-debug $@ @@ -152,7 +152,7 @@ $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldop $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group + $(LD) -m elf_i386 -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) --end-group $(obj)/coreboot.a: $$(ramstage-objs) @printf " AR $(subst $(obj)/,,$(@))\n" @@ -332,7 +332,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",, $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld @printf " LINK $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/bootblock/ldscript.ld $< + $(LD) -m elf_i386 -static -o $@ -L$(obj) $< -T $(obj)/bootblock/ldscript.ld $(NM) -n $(obj)/bootblock.elf | sort > $(obj)/bootblock.map $(OBJCOPY) --only-keep-debug $@ $(obj)/bootblock.debug $(OBJCOPY) --strip-debug $@ @@ -343,13 +343,13 @@ $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootbl $(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $$(romstage-objs) $(obj)/romstage/ldscript.ld @printf " LINK $(subst $(obj)/,,$(@))\n" printf "CONFIG_ROMBASE = 0x0;\n" > $(obj)/location.ld - $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs) + $(LD) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) $(romstage-objs) -T $(obj)/romstage/ldscript.ld $(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; } cat $(obj)/location.txt >> $(obj)/location.ld printf ';\n' >> $(obj)/location.ld - $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs) + $(LD) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) $(romstage-objs) -T $(obj)/romstage/ldscript.ld $(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map $(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug $(OBJCOPY) --strip-debug $(obj)/romstage.elf -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
