Zheng Bao ([email protected]) just uploaded a new patch set to gerrit, which 
you can find at http://review.coreboot.org/884

-gerrit

commit e520f750d05434957cdcc150c801006af5081fa9
Author: zbao <[email protected]>
Date:   Wed Apr 11 14:24:30 2012 +0800

    Leverage the Pstate table created by AGESA.
    
    The name of processor created by AGESA is P00n, whose P is
    BLDCFG_PROCESSOR_SCOPE_NAME and n starts from 0. The dsdt should be
    aligned with that.
    This feature has only been tested on persimmon. The changes on all the
    other boards were propagated.
    
    Change-Id: I8c3fa4b94406d530d2bed8e9a1f42b433bbec3ec
    Signed-off-by: Zheng Bao <[email protected]>
    Signed-off-by: zbao <[email protected]>
---
 src/mainboard/amd/dinar/acpi_tables.c         |    8 +-
 src/mainboard/amd/dinar/dsdt.asl              |   48 ++++++++---
 src/mainboard/amd/inagua/acpi_tables.c        |    8 +-
 src/mainboard/amd/inagua/dsdt.asl             |   24 ++++--
 src/mainboard/amd/persimmon/acpi_tables.c     |    8 +-
 src/mainboard/amd/persimmon/dsdt.asl          |   24 ++++--
 src/mainboard/amd/south_station/acpi_tables.c |   12 ++--
 src/mainboard/amd/south_station/dsdt.asl      |   24 ++++--
 src/mainboard/amd/torpedo/dsdt.asl            |   18 ++---
 src/mainboard/amd/union_station/acpi_tables.c |   12 ++--
 src/mainboard/amd/union_station/dsdt.asl      |   24 ++++--
 src/mainboard/asrock/e350m1/acpi_tables.c     |   12 ++--
 src/mainboard/asrock/e350m1/dsdt.asl          |   24 ++++--
 src/mainboard/supermicro/h8qgi/acpi_tables.c  |    8 +-
 src/mainboard/supermicro/h8qgi/dsdt.asl       |  114 ++++++++++++------------
 15 files changed, 222 insertions(+), 146 deletions(-)

diff --git a/src/mainboard/amd/dinar/acpi_tables.c 
b/src/mainboard/amd/dinar/acpi_tables.c
index ee00e81..741ba99 100644
--- a/src/mainboard/amd/dinar/acpi_tables.c
+++ b/src/mainboard/amd/dinar/acpi_tables.c
@@ -271,7 +271,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -279,11 +280,10 @@ unsigned long write_acpi_tables(unsigned long start)
                memcpy((void *)current, ssdt, ssdt->length);
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
+               acpi_add_table(rsdp,ssdt);
        } else {
-               printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
+               printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/amd/dinar/dsdt.asl b/src/mainboard/amd/dinar/dsdt.asl
index 1cbb05e..501ec78 100644
--- a/src/mainboard/amd/dinar/dsdt.asl
+++ b/src/mainboard/amd/dinar/dsdt.asl
@@ -51,37 +51,61 @@ DefinitionBlock (
          */
         Scope (\_PR) {          /* define processor scope */
                 Processor(
-                        CPU0,           /* name space name */
+                        C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                         0,              /* Unique number for this processor */
                         0x810,          /* PBLK system I/O address !hardcoded! 
*/
                         0x06            /* PBLKLEN for boot processor */
                         ) {
-                        #include "acpi/cpstate.asl"
                 }
                 Processor(
-                        CPU1,           /* name space name */
+                        C001,           /* name space name */
                         1,              /* Unique number for this processor */
-                        0x0000,         /* PBLK system I/O address !hardcoded! 
*/
-                        0x00            /* PBLKLEN for boot processor */
+                        0x810,         /* PBLK system I/O address !hardcoded! 
*/
+                        0x0            /* PBLKLEN for boot processor */
                         ) {
-                        #include "acpi/cpstate.asl"
                 }
                 Processor(
-                        CPU2,           /* name space name */
+                        C002,           /* name space name */
                         2,              /* Unique number for this processor */
-                        0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                        0x810,         /* PBLK system I/O address !hardcoded! 
*/
                         0x00            /* PBLKLEN for boot processor */
                         ) {
-                        #include "acpi/cpstate.asl"
                 }
                 Processor(
-                        CPU3,           /* name space name */
+                        C003,           /* name space name */
                         3,              /* Unique number for this processor */
-                        0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                        0x810,         /* PBLK system I/O address !hardcoded! 
*/
                         0x00            /* PBLKLEN for boot processor */
                         ) {
-                        #include "acpi/cpstate.asl"
                 }
+               Processor(
+                       C004,           /* name space name */
+                       4,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C005,           /* name space name */
+                       5,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C006,           /* name space name */
+                       6,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C007,           /* name space name */
+                       7,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
         } /* End _PR scope */
 
         /* PIC IRQ mapping registers, C00h-C01h. */
diff --git a/src/mainboard/amd/inagua/acpi_tables.c 
b/src/mainboard/amd/inagua/acpi_tables.c
index 8f47591..e521b4b 100644
--- a/src/mainboard/amd/inagua/acpi_tables.c
+++ b/src/mainboard/amd/inagua/acpi_tables.c
@@ -238,7 +238,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -247,12 +248,9 @@ unsigned long write_acpi_tables(unsigned long start)
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
                acpi_add_table(rsdp,ssdt);
-       }
-       else {
+       } else {
                printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/amd/inagua/dsdt.asl 
b/src/mainboard/amd/inagua/dsdt.asl
index 361adbb..7708676 100644
--- a/src/mainboard/amd/inagua/dsdt.asl
+++ b/src/mainboard/amd/inagua/dsdt.asl
@@ -64,21 +64,33 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       CPU0,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0,              /* Unique number for this processor */
-                       0x808,          /* PBLK system I/O address !hardcoded! 
*/
+                       0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
 
                Processor(
-                       CPU1,           /* name space name */
+                       C001,           /* name space name */
                        1,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C002,           /* name space name */
+                       2,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C003,           /* name space name */
+                       3,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
        } /* End _PR scope */
 
diff --git a/src/mainboard/amd/persimmon/acpi_tables.c 
b/src/mainboard/amd/persimmon/acpi_tables.c
index 9526fea..00a08d2 100644
--- a/src/mainboard/amd/persimmon/acpi_tables.c
+++ b/src/mainboard/amd/persimmon/acpi_tables.c
@@ -238,7 +238,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -247,12 +248,9 @@ unsigned long write_acpi_tables(unsigned long start)
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
                acpi_add_table(rsdp,ssdt);
-       }
-       else {
+       } else {
                printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/amd/persimmon/dsdt.asl 
b/src/mainboard/amd/persimmon/dsdt.asl
index b480c33..bd9ce74 100644
--- a/src/mainboard/amd/persimmon/dsdt.asl
+++ b/src/mainboard/amd/persimmon/dsdt.asl
@@ -64,21 +64,33 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       CPU0,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0,              /* Unique number for this processor */
-                       0x808,          /* PBLK system I/O address !hardcoded! 
*/
+                       0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
 
                Processor(
-                       CPU1,           /* name space name */
+                       C001,           /* name space name */
                        1,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C002,           /* name space name */
+                       2,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C003,           /* name space name */
+                       3,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
        } /* End _PR scope */
 
diff --git a/src/mainboard/amd/south_station/acpi_tables.c 
b/src/mainboard/amd/south_station/acpi_tables.c
index 2e6e50f..c49a8e2 100644
--- a/src/mainboard/amd/south_station/acpi_tables.c
+++ b/src/mainboard/amd/south_station/acpi_tables.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -237,7 +238,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -245,12 +247,10 @@ unsigned long write_acpi_tables(unsigned long start)
                memcpy((void *)current, ssdt, ssdt->length);
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
+               acpi_add_table(rsdp,ssdt);
+       } else {
+               printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       else {
-               printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
-       }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/amd/south_station/dsdt.asl 
b/src/mainboard/amd/south_station/dsdt.asl
index 7f03a43..b18bcb2 100644
--- a/src/mainboard/amd/south_station/dsdt.asl
+++ b/src/mainboard/amd/south_station/dsdt.asl
@@ -64,21 +64,33 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       CPU0,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0,              /* Unique number for this processor */
-                       0x808,          /* PBLK system I/O address !hardcoded! 
*/
+                       0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
 
                Processor(
-                       CPU1,           /* name space name */
+                       C001,           /* name space name */
                        1,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C002,           /* name space name */
+                       2,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C003,           /* name space name */
+                       3,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
        } /* End _PR scope */
 
diff --git a/src/mainboard/amd/torpedo/dsdt.asl 
b/src/mainboard/amd/torpedo/dsdt.asl
index a8a731d..758fba5 100755
--- a/src/mainboard/amd/torpedo/dsdt.asl
+++ b/src/mainboard/amd/torpedo/dsdt.asl
@@ -51,36 +51,32 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       CPU0,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0,              /* Unique number for this processor */
                        0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
                Processor(
-                       CPU1,           /* name space name */
+                       C001,           /* name space name */
                        1,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
                Processor(
-                       CPU2,           /* name space name */
+                       C002,           /* name space name */
                        2,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
                Processor(
-                       CPU3,           /* name space name */
+                       C003,           /* name space name */
                        3,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
        } /* End _PR scope */
 
diff --git a/src/mainboard/amd/union_station/acpi_tables.c 
b/src/mainboard/amd/union_station/acpi_tables.c
index 2e6e50f..c49a8e2 100644
--- a/src/mainboard/amd/union_station/acpi_tables.c
+++ b/src/mainboard/amd/union_station/acpi_tables.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -237,7 +238,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -245,12 +247,10 @@ unsigned long write_acpi_tables(unsigned long start)
                memcpy((void *)current, ssdt, ssdt->length);
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
+               acpi_add_table(rsdp,ssdt);
+       } else {
+               printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       else {
-               printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
-       }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/amd/union_station/dsdt.asl 
b/src/mainboard/amd/union_station/dsdt.asl
index fb2cfe8..7e49fd4 100644
--- a/src/mainboard/amd/union_station/dsdt.asl
+++ b/src/mainboard/amd/union_station/dsdt.asl
@@ -64,21 +64,33 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       CPU0,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0,              /* Unique number for this processor */
-                       0x808,          /* PBLK system I/O address !hardcoded! 
*/
+                       0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
 
                Processor(
-                       CPU1,           /* name space name */
+                       C001,           /* name space name */
                        1,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C002,           /* name space name */
+                       2,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C003,           /* name space name */
+                       3,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
        } /* End _PR scope */
 
diff --git a/src/mainboard/asrock/e350m1/acpi_tables.c 
b/src/mainboard/asrock/e350m1/acpi_tables.c
index 2e6e50f..c49a8e2 100644
--- a/src/mainboard/asrock/e350m1/acpi_tables.c
+++ b/src/mainboard/asrock/e350m1/acpi_tables.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -237,7 +238,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -245,12 +247,10 @@ unsigned long write_acpi_tables(unsigned long start)
                memcpy((void *)current, ssdt, ssdt->length);
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
+               acpi_add_table(rsdp,ssdt);
+       } else {
+               printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       else {
-               printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
-       }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/asrock/e350m1/dsdt.asl 
b/src/mainboard/asrock/e350m1/dsdt.asl
index 97533c1..c2ea1fb 100644
--- a/src/mainboard/asrock/e350m1/dsdt.asl
+++ b/src/mainboard/asrock/e350m1/dsdt.asl
@@ -64,21 +64,33 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       CPU0,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0,              /* Unique number for this processor */
-                       0x808,          /* PBLK system I/O address !hardcoded! 
*/
+                       0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
 
                Processor(
-                       CPU1,           /* name space name */
+                       C001,           /* name space name */
                        1,              /* Unique number for this processor */
-                       0x0000,         /* PBLK system I/O address !hardcoded! 
*/
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C002,           /* name space name */
+                       2,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
+                       0x00            /* PBLKLEN for boot processor */
+                       ) {
+               }
+               Processor(
+                       C003,           /* name space name */
+                       3,              /* Unique number for this processor */
+                       0x810           ,               /* PBLK system I/O 
address !hardcoded! */
                        0x00            /* PBLKLEN for boot processor */
                        ) {
-                       #include "acpi/cpstate.asl"
                }
        } /* End _PR scope */
 
diff --git a/src/mainboard/supermicro/h8qgi/acpi_tables.c 
b/src/mainboard/supermicro/h8qgi/acpi_tables.c
index 7314283..7b97a92 100644
--- a/src/mainboard/supermicro/h8qgi/acpi_tables.c
+++ b/src/mainboard/supermicro/h8qgi/acpi_tables.c
@@ -271,7 +271,8 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. 
Skipping.\n");
        }
 
-#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
+       /* The DSDT needs additional work for the AGESA SSDT Pstate table */
+       /* Keep the comment for a while. */
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -279,11 +280,10 @@ unsigned long write_acpi_tables(unsigned long start)
                memcpy((void *)current, ssdt, ssdt->length);
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
+               acpi_add_table(rsdp,ssdt);
        } else {
-               printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
+               printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. 
Skipping.\n");
        }
-       acpi_add_table(rsdp,ssdt);
-#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
diff --git a/src/mainboard/supermicro/h8qgi/dsdt.asl 
b/src/mainboard/supermicro/h8qgi/dsdt.asl
index 137a90d..39ad9d8 100644
--- a/src/mainboard/supermicro/h8qgi/dsdt.asl
+++ b/src/mainboard/supermicro/h8qgi/dsdt.asl
@@ -65,69 +65,69 @@ DefinitionBlock (
         */
        Scope (\_PR) {          /* define processor scope */
                Processor(
-                       P000,           /* name space name */
+                       C000,           /* name space name, align with 
BLDCFG_PROCESSOR_SCOPE_NAME[01] */
                        0x00,           /* Unique number for this processor */
                        0x810,          /* PBLK system I/O address !hardcoded! 
*/
                        0x06            /* PBLKLEN for boot processor */
                        ) {
                        //#include "acpi/cpstate.asl"
                }
-               Processor(P001, 0x01, 0x00000000, 0x00) {}
-               Processor(P002, 0x02, 0x00000000, 0x00) {}
-               Processor(P003, 0x03, 0x00000000, 0x00) {}
-               Processor(P004, 0x04, 0x00000000, 0x00) {}
-               Processor(P005, 0x05, 0x00000000, 0x00) {}
-               Processor(P006, 0x06, 0x00000000, 0x00) {}
-               Processor(P007, 0x07, 0x00000000, 0x00) {}
-               Processor(P008, 0x08, 0x00000000, 0x00) {}
-               Processor(P009, 0x09, 0x00000000, 0x00) {}
-               Processor(P00A, 0x0A, 0x00000000, 0x00) {}
-               Processor(P00B, 0x0B, 0x00000000, 0x00) {}
-               Processor(P00C, 0x0C, 0x00000000, 0x00) {}
-               Processor(P00D, 0x0D, 0x00000000, 0x00) {}
-               Processor(P00E, 0x0E, 0x00000000, 0x00) {}
-               Processor(P00F, 0x0F, 0x00000000, 0x00) {}
-               Processor(P010, 0x10, 0x00000000, 0x00) {}
-               Processor(P011, 0x11, 0x00000000, 0x00) {}
-               Processor(P012, 0x12, 0x00000000, 0x00) {}
-               Processor(P013, 0x13, 0x00000000, 0x00) {}
-               Processor(P014, 0x14, 0x00000000, 0x00) {}
-               Processor(P015, 0x15, 0x00000000, 0x00) {}
-               Processor(P016, 0x16, 0x00000000, 0x00) {}
-               Processor(P017, 0x17, 0x00000000, 0x00) {}
-               Processor(P018, 0x18, 0x00000000, 0x00) {}
-               Processor(P019, 0x19, 0x00000000, 0x00) {}
-               Processor(P01A, 0x1A, 0x00000000, 0x00) {}
-               Processor(P01B, 0x1B, 0x00000000, 0x00) {}
-               Processor(P01C, 0x1C, 0x00000000, 0x00) {}
-               Processor(P01D, 0x1D, 0x00000000, 0x00) {}
-               Processor(P01E, 0x1E, 0x00000000, 0x00) {}
-               Processor(P01F, 0x1F, 0x00000000, 0x00) {}
-               Processor(P020, 0x20, 0x00000000, 0x00) {}
-               Processor(P021, 0x21, 0x00000000, 0x00) {}
-               Processor(P022, 0x22, 0x00000000, 0x00) {}
-               Processor(P023, 0x23, 0x00000000, 0x00) {}
-               Processor(P024, 0x24, 0x00000000, 0x00) {}
-               Processor(P025, 0x25, 0x00000000, 0x00) {}
-               Processor(P026, 0x26, 0x00000000, 0x00) {}
-               Processor(P027, 0x27, 0x00000000, 0x00) {}
-               Processor(P028, 0x28, 0x00000000, 0x00) {}
-               Processor(P029, 0x29, 0x00000000, 0x00) {}
-               Processor(P02A, 0x2A, 0x00000000, 0x00) {}
-               Processor(P02B, 0x2B, 0x00000000, 0x00) {}
-               Processor(P02C, 0x2C, 0x00000000, 0x00) {}
-               Processor(P02D, 0x2D, 0x00000000, 0x00) {}
-               Processor(P02E, 0x2E, 0x00000000, 0x00) {}
-               Processor(P02F, 0x2F, 0x00000000, 0x00) {}
-               Alias (P000, CPU0)
-               Alias (P001, CPU1)
-               Alias (P002, CPU2)
-               Alias (P003, CPU3)
-               Alias (P004, CPU4)
-               Alias (P005, CPU5)
-               Alias (P006, CPU6)
-               Alias (P007, CPU7)
-               Alias (P008, CPU8)
+               Processor(C001, 0x01, 0x00000000, 0x00) {}
+               Processor(C002, 0x02, 0x00000000, 0x00) {}
+               Processor(C003, 0x03, 0x00000000, 0x00) {}
+               Processor(C004, 0x04, 0x00000000, 0x00) {}
+               Processor(C005, 0x05, 0x00000000, 0x00) {}
+               Processor(C006, 0x06, 0x00000000, 0x00) {}
+               Processor(C007, 0x07, 0x00000000, 0x00) {}
+               Processor(C008, 0x08, 0x00000000, 0x00) {}
+               Processor(C009, 0x09, 0x00000000, 0x00) {}
+               Processor(C00A, 0x0A, 0x00000000, 0x00) {}
+               Processor(C00B, 0x0B, 0x00000000, 0x00) {}
+               Processor(C00C, 0x0C, 0x00000000, 0x00) {}
+               Processor(C00D, 0x0D, 0x00000000, 0x00) {}
+               Processor(C00E, 0x0E, 0x00000000, 0x00) {}
+               Processor(C00F, 0x0F, 0x00000000, 0x00) {}
+               Processor(C010, 0x10, 0x00000000, 0x00) {}
+               Processor(C011, 0x11, 0x00000000, 0x00) {}
+               Processor(C012, 0x12, 0x00000000, 0x00) {}
+               Processor(C013, 0x13, 0x00000000, 0x00) {}
+               Processor(C014, 0x14, 0x00000000, 0x00) {}
+               Processor(C015, 0x15, 0x00000000, 0x00) {}
+               Processor(C016, 0x16, 0x00000000, 0x00) {}
+               Processor(C017, 0x17, 0x00000000, 0x00) {}
+               Processor(C018, 0x18, 0x00000000, 0x00) {}
+               Processor(C019, 0x19, 0x00000000, 0x00) {}
+               Processor(C01A, 0x1A, 0x00000000, 0x00) {}
+               Processor(C01B, 0x1B, 0x00000000, 0x00) {}
+               Processor(C01C, 0x1C, 0x00000000, 0x00) {}
+               Processor(C01D, 0x1D, 0x00000000, 0x00) {}
+               Processor(C01E, 0x1E, 0x00000000, 0x00) {}
+               Processor(C01F, 0x1F, 0x00000000, 0x00) {}
+               Processor(C020, 0x20, 0x00000000, 0x00) {}
+               Processor(C021, 0x21, 0x00000000, 0x00) {}
+               Processor(C022, 0x22, 0x00000000, 0x00) {}
+               Processor(C023, 0x23, 0x00000000, 0x00) {}
+               Processor(C024, 0x24, 0x00000000, 0x00) {}
+               Processor(C025, 0x25, 0x00000000, 0x00) {}
+               Processor(C026, 0x26, 0x00000000, 0x00) {}
+               Processor(C027, 0x27, 0x00000000, 0x00) {}
+               Processor(C028, 0x28, 0x00000000, 0x00) {}
+               Processor(C029, 0x29, 0x00000000, 0x00) {}
+               Processor(C02A, 0x2A, 0x00000000, 0x00) {}
+               Processor(C02B, 0x2B, 0x00000000, 0x00) {}
+               Processor(C02C, 0x2C, 0x00000000, 0x00) {}
+               Processor(C02D, 0x2D, 0x00000000, 0x00) {}
+               Processor(C02E, 0x2E, 0x00000000, 0x00) {}
+               Processor(C02F, 0x2F, 0x00000000, 0x00) {}
+               Alias (C000, CPU0)
+               Alias (C001, CPU1)
+               Alias (C002, CPU2)
+               Alias (C003, CPU3)
+               Alias (C004, CPU4)
+               Alias (C005, CPU5)
+               Alias (C006, CPU6)
+               Alias (C007, CPU7)
+               Alias (C008, CPU8)
        } /* End _PR scope */
 
        /* PIC IRQ mapping registers, C00h-C01h */

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