Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/950
-gerrit commit 6a012104bf8e7a8c46ee7c6cff8d0f2df6e50d6e Author: Stefan Reinauer <[email protected]> Date: Fri Apr 27 23:13:39 2012 +0200 Fix up Sandybridge C state generation code This code fixes the sandybridge C state generation code to work with the current version of the ACPI code generator. Change-Id: I56ae1185dc0694c06976236523fdcbe5c1795b01 Signed-off-by: Stefan Reinauer <[email protected]> --- src/arch/x86/include/arch/cpu.h | 1 + src/cpu/intel/model_206ax/acpi.c | 18 ++++++++++++------ 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index fc03c85..0dc92fb 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -152,6 +152,7 @@ struct cpu_device_id { struct cpu_driver { struct device_operations *ops; struct cpu_device_id *id_table; + struct acpi_cstate *cstates; }; struct device; diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 3a3a1fd..1a8ceb7 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -76,12 +76,18 @@ static int generate_cstate_entries(acpi_cstate_t *cstates, length += acpigen_write_byte(cstate_count); /* Add an entry if the level is enabled */ - if (c1 > 0) - length += acpigen_write_CST_package(1, &cstates[c1]); - if (c2 > 0) - length += acpigen_write_CST_package(2, &cstates[c2]); - if (c3 > 0) - length += acpigen_write_CST_package(3, &cstates[c3]); + if (c1 > 0) { + cstates[c1].ctype = 1; + length += acpigen_write_CST_package_entry(&cstates[c1]); + } + if (c2 > 0) { + cstates[c2].ctype = 2; + length += acpigen_write_CST_package_entry(&cstates[c2]); + } + if (c3 > 0) { + cstates[c2].ctype = 2; + length += acpigen_write_CST_package_entry(&cstates[c3]); + } acpigen_patch_len(length - 1); return length; -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
