On 5/12/12 1:43 AM, ali hagigat wrote:
If the CPU wb (write back) cache is enabled for the memory range,
ramstage() is OK. But CPU can not work with UC(uncached) memory type
in Coreboot code. If i define the whole memory un-cached right before
jumping to ramstage code ( cbfs_and_run()), CPU does not execute
C_start.S and it is actually restarted!
Any clue or idea will be much appreciated.
It means your memory is misconfigured, but leaving the cache enabled
hides this effect.
Stefan
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