Kyösti Mälkki ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1210
-gerrit commit c1586a09de645b484b66bf0e7e3a0554fc999d08 Author: Kyösti Mälkki <[email protected]> Date: Wed Jul 11 08:03:13 2012 +0300 Move setup_uma_memory() to K8 northbridge These boards had identical UMA code: amd/dbm690t amd/pistachio technexion/tim5690 technexion/tim8690 The ones below had whitespace or debug level change compared to the one above: kontron/kt690 siemens/sitemp_g1p1 These boards use AMDFAM10 guidelines in code: asrock/939a785gmh amd/mahogany Change-Id: Id7c3f48035727f5847f2d7c3a6e87a3d15582003 Signed-off-by: Kyösti Mälkki <[email protected]> --- src/mainboard/amd/dbm690t/mainboard.c | 41 +---------------- src/mainboard/amd/mahogany/mainboard.c | 41 +---------------- src/mainboard/amd/pistachio/mainboard.c | 41 +---------------- src/mainboard/asrock/939a785gmh/mainboard.c | 40 +--------------- src/mainboard/kontron/kt690/mainboard.c | 41 +---------------- src/mainboard/siemens/sitemp_g1p1/mainboard.c | 46 +------------------ src/mainboard/technexion/tim5690/mainboard.c | 41 +---------------- src/mainboard/technexion/tim8690/mainboard.c | 41 +---------------- src/northbridge/amd/amdk8/northbridge.c | 63 +++++++++++++++++++++++++ 9 files changed, 71 insertions(+), 324 deletions(-) diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c index c5515b4..33f0839 100644 --- a/src/mainboard/amd/dbm690t/mainboard.c +++ b/src/mainboard/amd/dbm690t/mainboard.c @@ -186,46 +186,7 @@ static void dbm690t_enable(device_t dev) { printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev); -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x2000000; /* 32M recommended UMA */ - break; - - case 0x18000000: /* 384M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - uma_memory_base = 0x38000000; /* 1GB system memory supposed */ -#endif + setup_uma_memory(); enable_onboard_nic(); get_ide_dma66(); diff --git a/src/mainboard/amd/mahogany/mainboard.c b/src/mainboard/amd/mahogany/mainboard.c index a263f6e..5cc6c92 100644 --- a/src/mainboard/amd/mahogany/mainboard.c +++ b/src/mainboard/amd/mahogany/mainboard.c @@ -102,46 +102,7 @@ u8 is_dev3_present(void) static void mahogany_enable(device_t dev) { printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev); - -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk - (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk - (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - /* refer to UMA Size Consideration in 780 BDG. */ - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x10000000; /* 256M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - uma_memory_base = 0x38000000; /* 1GB system memory supposed */ -#endif + setup_uma_memory(); set_pcie_dereset(); /* get_ide_dma66(); */ diff --git a/src/mainboard/amd/pistachio/mainboard.c b/src/mainboard/amd/pistachio/mainboard.c index 6f62b58..dfee586 100644 --- a/src/mainboard/amd/pistachio/mainboard.c +++ b/src/mainboard/amd/pistachio/mainboard.c @@ -256,46 +256,7 @@ static void pistachio_enable(device_t dev) { printk(BIOS_INFO, "Mainboard Pistachio Enable. dev=0x%p\n", dev); -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x2000000; /* 32M recommended UMA */ - break; - - case 0x18000000: /* 384M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - uma_memory_base = 0x38000000; /* 1GB system memory supposed */ -#endif + setup_uma_memory(); enable_onboard_nic(); diff --git a/src/mainboard/asrock/939a785gmh/mainboard.c b/src/mainboard/asrock/939a785gmh/mainboard.c index d1b06c5..e574fa9 100644 --- a/src/mainboard/asrock/939a785gmh/mainboard.c +++ b/src/mainboard/asrock/939a785gmh/mainboard.c @@ -101,45 +101,7 @@ static void mb_enable(device_t dev) { printk(BIOS_INFO, "Mainboard 939A785GMH/128M Enable. dev=0x%p\n", dev); -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk - (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk - (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - /* refer to UMA Size Consideration in 780 BDG. */ - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x10000000; /* 256M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - uma_memory_base = 0x38000000; /* 1GB system memory supposed */ -#endif + setup_uma_memory(); set_pcie_dereset(); /* get_ide_dma66(); */ diff --git a/src/mainboard/kontron/kt690/mainboard.c b/src/mainboard/kontron/kt690/mainboard.c index fcb2462..726a26e 100644 --- a/src/mainboard/kontron/kt690/mainboard.c +++ b/src/mainboard/kontron/kt690/mainboard.c @@ -186,46 +186,7 @@ static void kt690_enable(device_t dev) { printk(BIOS_INFO, "Mainboard KT690 Enable. dev=0x%p\n", dev); -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x2000000; /* 32M recommended UMA */ - break; - - case 0x18000000: /* 384M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x0; - uma_memory_base = 0x0; -#endif + setup_uma_memory(); enable_onboard_nic(); get_ide_dma66(); diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c index 840e060..fa29ea3 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c +++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c @@ -851,51 +851,7 @@ static void enable_dev(device_t dev) detect_hw_variant(dev); update_subsystemid(dev); - -#if CONFIG_GFXUMA - { - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk(BIOS_DEBUG, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - - printk(BIOS_DEBUG, "%s, TOP MEM2: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x2000000; /* 32M recommended UMA */ - break; - - case 0x18000000: /* 384M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ - } -#else - uma_memory_size = 0; - uma_memory_base = 0; -#endif + setup_uma_memory(); dev->ops->init = init; // rest of mainboard init later } diff --git a/src/mainboard/technexion/tim5690/mainboard.c b/src/mainboard/technexion/tim5690/mainboard.c index ab21212..d1994cb 100644 --- a/src/mainboard/technexion/tim5690/mainboard.c +++ b/src/mainboard/technexion/tim5690/mainboard.c @@ -240,46 +240,7 @@ static void tim5690_enable(device_t dev) vbios_regs.int15_regs.fun05_tv_standard = TV_MODE_NO; vgabios_init(&vbios_regs); -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x2000000; /* 32M recommended UMA */ - break; - - case 0x18000000: /* 384M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - uma_memory_base = 0x38000000; /* 1GB system memory supposed */ -#endif + setup_uma_memory(); set_thermal_config(); } diff --git a/src/mainboard/technexion/tim8690/mainboard.c b/src/mainboard/technexion/tim8690/mainboard.c index 45b1b4d..80a43ff 100644 --- a/src/mainboard/technexion/tim8690/mainboard.c +++ b/src/mainboard/technexion/tim8690/mainboard.c @@ -146,46 +146,7 @@ static void tim8690_enable(device_t dev) { printk(BIOS_INFO, "Mainboard tim8690 Enable. dev=0x%p\n", dev); -#if CONFIG_GFXUMA - msr_t msr, msr2; - - /* TOP_MEM: the top of DRAM below 4G */ - msr = rdmsr(TOP_MEM); - printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __func__, msr.lo, msr.hi); - - /* TOP_MEM2: the top of DRAM above 4G */ - msr2 = rdmsr(TOP_MEM2); - printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __func__, msr2.lo, msr2.hi); - - switch (msr.lo) { - case 0x10000000: /* 256M system memory */ - uma_memory_size = 0x2000000; /* 32M recommended UMA */ - break; - - case 0x18000000: /* 384M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - case 0x20000000: /* 512M system memory */ - uma_memory_size = 0x4000000; /* 64M recommended UMA */ - break; - - default: /* 1GB and above system memory */ - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - break; - } - - uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", - __func__, uma_memory_size, uma_memory_base); - - /* TODO: TOP_MEM2 */ -#else - uma_memory_size = 0x8000000; /* 128M recommended UMA */ - uma_memory_base = 0x38000000; /* 1GB system memory supposed */ -#endif + setup_uma_memory(); enable_onboard_nic(); set_thermal_config(); diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 8b9140d..a7aa19d 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -18,6 +18,7 @@ #include <cpu/cpu.h> #include <cpu/x86/lapic.h> +#include <cpu/amd/mtrr.h> #include <cpu/amd/multicore.h> #if CONFIG_LOGICAL_CPUS @@ -822,6 +823,68 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id) #include <cbmem.h> #endif +void setup_uma_memory(void) +{ +#if CONFIG_GFXUMA + msr_t msr, msr2; + + /* TOP_MEM: the top of DRAM below 4G */ + msr = rdmsr(TOP_MEM); + printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __func__, msr.lo, msr.hi); + + /* TOP_MEM2: the top of DRAM above 4G */ + msr2 = rdmsr(TOP_MEM2); + printk(BIOS_INFO, "%s, TOP MEM2: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __func__, msr2.lo, msr2.hi); + +#if !CONFIG_BOARD_ASROCK_939A785GMH && !CONFIG_BOARD_AMD_MAHOGANY + + switch (msr.lo) { + case 0x10000000: /* 256M system memory */ + uma_memory_size = 0x2000000; /* 32M recommended UMA */ + break; + + case 0x18000000: /* 384M system memory */ + uma_memory_size = 0x4000000; /* 64M recommended UMA */ + break; + + case 0x20000000: /* 512M system memory */ + uma_memory_size = 0x4000000; /* 64M recommended UMA */ + break; + + default: /* 1GB and above system memory */ + uma_memory_size = 0x8000000; /* 128M recommended UMA */ + break; + } +#else + /* refer to UMA Size Consideration in 780 BDG. */ + switch (msr.lo) { + case 0x10000000: /* 256M system memory */ + uma_memory_size = 0x4000000; /* 64M recommended UMA */ + break; + + case 0x20000000: /* 512M system memory */ + uma_memory_size = 0x8000000; /* 128M recommended UMA */ + break; + + default: /* 1GB and above system memory */ + uma_memory_size = 0x10000000; /* 256M recommended UMA */ + break; + } +#endif + + uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ + printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", + __func__, uma_memory_size, uma_memory_base); + + /* TODO: TOP_MEM2 */ +#else + uma_memory_size = 0x8000000; /* 128M recommended UMA */ + uma_memory_base = 0x38000000; /* 1GB system memory supposed */ +#endif +} + static void amdk8_domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
