Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1292
-gerrit commit fd2d35281ebb6d59d06fcd53a19f7e7d325dd5a3 Author: Vadim Bendebury <[email protected]> Date: Tue Jun 19 04:20:20 2012 +0000 Config changes to support microcode in CBFS Nothing is yet enabled, this is just a config skeleton change. The MICROCODE_INCLUDE_PATH definition is going to be used by the Makefile building the microcode blob for CBFS inclusion. Change-Id: I7868db3cfd4b181500e361706e5f4dc08ca1c87d Signed-off-by: Vadim Bendebury <[email protected]> --- src/cpu/Kconfig | 9 +++++++++ src/cpu/intel/model_206ax/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+), 0 deletions(-) diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 85e83d4..5196e1a 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -61,4 +61,13 @@ config SSE2 streaming SIMD instructions. Some parts of coreboot can be built with more efficient code if SSE2 instructions are available. +if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX + +config MICROCODE_IN_CBFS + bool "Look for microcode in CBFS" + help + Load microcode updates from CBFS instead of compiling them in. + +endif + endif # ARCH_X86 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 6c70993..1d4ff02 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -21,6 +21,12 @@ config SMM_TSEG_SIZE hex default 0x800000 +if MICROCODE_IN_CBFS +config MICROCODE_INCLUDE_PATH + string + default "src/cpu/intel/model_206ax" +endif + endif if CPU_INTEL_MODEL_206AX -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
