Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1336
-gerrit commit d95d46c972a6a150e11cfc61bde2830545ad61d3 Author: Stefan Reinauer <[email protected]> Date: Tue Jul 10 17:16:10 2012 -0700 Fix comment to reference IvyBridge, too On both SandyBridge and IvyBridge BCLK is fixed at 100MHz. Have the comment reflect that. Change-Id: Ia81c3501dc3e68cf3143c3bc864dfbf88901f9f9 Signed-off-by: Stefan Reinauer <[email protected]> --- src/cpu/intel/model_206ax/model_206ax.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 8259d89..cdcc233 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -22,7 +22,7 @@ #ifndef _CPU_INTEL_MODEL_206AX_H #define _CPU_INTEL_MODEL_206AX_H -/* SandyBridge bus clock is fixed at 100MHz */ +/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ #define SANDYBRIDGE_BCLK 100 #define IA32_FEATURE_CONTROL 0x3a -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
