thank you! Marc what is the scheme of of the pci scanning? when a new pci device is detected, all the pci device are re-scanned? for example,bridge 00:14.4 is scanned two times. there is a vga device connected to this bridge and the vga is allocted different bus number in the scanning. so I don't think it is resonable.
Thank youi! On Thu, Sep 27, 2012 at 1:15 AM, Marc Jones <[email protected]> wrote: > On Wed, Sep 26, 2012 at 4:14 AM, 王思源 <[email protected]> wrote: >> it seems that the pci devices are scanned two rounds in our mainboard. >> first round: bus 0 -> bridge 00:14.4 -> bus 1 (this is the vga device >> under the bridge 00:14.4) >> second round: bus 0 -> bridge 00:02.0 -> bridge 00:04.0 -> bridge >> 00:05.0. this bridges are all pcie bridges. >> >> I want to know whether the two rounds scanning style is right. if it >> is designed to scan two rounds, why? >> any reply is helpful to me. >> thank you! >> > Yes, there are multiple steps in device tress and pci resource > discovery and allocation. > >> WANG Siyuan >> >> -- >> coreboot mailing list: [email protected] >> http://www.coreboot.org/mailman/listinfo/coreboot > > > > -- > http://se-eng.com -- 王思源 -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
