Zheng Bao ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1610
-gerrit commit 85326fb0333090a6a562f824c40bde39a700e0c9 Author: Zheng Bao <[email protected]> Date: Wed Oct 24 11:22:38 2012 +0800 AMD SB800: Interrupt routine for PCI slots on Persimmon Set the correct device number in the pcie interrupt routine in ACPI asl. The device number is decided by which address pin is connected to IDSEL. Table 3-1: IDSEL Generation Primary Address AD[15::11] Secondary Address AD[31::16] 0 0000 0000 0000 0000 0001 0 0001 0000 0000 0000 0010 0 0010 0000 0000 0000 0100 0 0011 0000 0000 0000 1000 0 0100 0000 0000 0001 0000 0 0101 0000 0000 0010 0000 0 0110 0000 0000 0100 0000 0 0111 0000 0000 1000 0000 0 1000 0000 0001 0000 0000 0 1001 0000 0010 0000 0000 0 1010 0000 0100 0000 0000 0 1011 0000 1000 0000 0000 0 1100 0001 0000 0000 0000 0 1101 0010 0000 0000 0000 0 1110 0100 0000 0000 0000 0 1111 1000 0000 0000 0000 1 xxxx 0000 0000 0000 0000 On persimmon, PCI slot 0's IDSEL is connected to AD19, so the device number is 3. Slot 1's IDSEL is connected to AD20, so the device number is 4. Change-Id: Ic0fb7ac1c87ec306bf314e4d2b8c2bdc9031081b Signed-off-by: Zheng Bao <[email protected]> Signed-off-by: zbao <[email protected]> --- src/mainboard/amd/persimmon/acpi/routing.asl | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/mainboard/amd/persimmon/acpi/routing.asl b/src/mainboard/amd/persimmon/acpi/routing.asl index d7e4687..24bc809 100644 --- a/src/mainboard/amd/persimmon/acpi/routing.asl +++ b/src/mainboard/amd/persimmon/acpi/routing.asl @@ -391,17 +391,17 @@ Scope(\_SB) { Name(PCIB, Package(){ /* PCI slots: slot 0, slot 1, slot 2 behind Dev14, Fun4. */ - Package(){0x0005FFFF, 0, 0, 0x14 }, - Package(){0x0005FFFF, 1, 0, 0x15 }, - Package(){0x0005FFFF, 2, 0, 0x16 }, - Package(){0x0005FFFF, 3, 0, 0x17 }, - Package(){0x0006FFFF, 0, 0, 0x15 }, - Package(){0x0006FFFF, 1, 0, 0x16 }, - Package(){0x0006FFFF, 2, 0, 0x17 }, - Package(){0x0006FFFF, 3, 0, 0x14 }, - Package(){0x0007FFFF, 0, 0, 0x16 }, - Package(){0x0007FFFF, 1, 0, 0x17 }, - Package(){0x0007FFFF, 2, 0, 0x14 }, - Package(){0x0007FFFF, 3, 0, 0x15 }, + Package(){0x0003FFFF, 0, 0, 0x14 }, + Package(){0x0003FFFF, 1, 0, 0x15 }, + Package(){0x0003FFFF, 2, 0, 0x16 }, + Package(){0x0003FFFF, 3, 0, 0x17 }, + Package(){0x0004FFFF, 0, 0, 0x15 }, + Package(){0x0004FFFF, 1, 0, 0x16 }, + Package(){0x0004FFFF, 2, 0, 0x17 }, + Package(){0x0004FFFF, 3, 0, 0x14 }, + Package(){0x0005FFFF, 0, 0, 0x16 }, + Package(){0x0005FFFF, 1, 0, 0x17 }, + Package(){0x0005FFFF, 2, 0, 0x14 }, + Package(){0x0005FFFF, 3, 0, 0x15 }, }) } -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
