the following patch was just integrated into master:
commit fa90fd4f2f4aab4da25bb0c89cb408de36443a25
Author: Vincent Palatin <[email protected]>
Date: Tue Aug 7 17:03:40 2012 -0700
rtc: erase CMOS memory after power failure
When a power failure happens on the RTC rail, the CMOS memory (including
the RTC registers) is filled with garbage.
So, we erase the full first bank (112 bytes) and we reset the RTC date
to the build date.
To test, disconnect the CMOS battery to produce an RTC power
failure, then boot the machine and observe the RTC date is the build
date using "cat /sys/class/rtc/rtc0/date"
Change-Id: I684bb3ad5079f96825555d4ed84dc0f7914e9884
Signed-off-by: Vincent Palatin <[email protected]>
Reviewed-on: http://review.coreboot.org/1697
Reviewed-by: Marc Jones <[email protected]>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Wed Nov 7 04:58:53 2012, giving +1
See http://review.coreboot.org/1697 for details.
-gerrit
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