Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1752
-gerrit commit d9a90923f48df4a504fab5f132f38e9e9e69f6c3 Author: Stefan Reinauer <[email protected]> Date: Wed Sep 19 11:10:15 2012 -0700 vboot: Add option to skip TPM resume on S3 resume Change-Id: Ie4a98cc8af0dbcf09c7ace79668949ace5938c12 Signed-off-by: Stefan Reinauer <[email protected]> --- src/vendorcode/google/chromeos/Kconfig | 9 +++++++++ src/vendorcode/google/chromeos/vboot.c | 6 ++++++ 2 files changed, 15 insertions(+) diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index ace0c18..9836d59 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -65,3 +65,12 @@ config FLASHMAP_OFFSET Offset of flash map in firmware image endmenu + +config NO_TPM_RESUME + bool + default n + depends on CHROMEOS + help + On some boards the TPM stays powered up in S3. On those + boards, booting Windows will break if the TPM resume command + is sent during an S3 resume. diff --git a/src/vendorcode/google/chromeos/vboot.c b/src/vendorcode/google/chromeos/vboot.c index 5bdb7a2..0f30547 100644 --- a/src/vendorcode/google/chromeos/vboot.c +++ b/src/vendorcode/google/chromeos/vboot.c @@ -39,6 +39,11 @@ #define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1)) #define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2)) +#if CONFIG_NO_TPM_RESUME +static void init_vboot(int bootmode) +{ +} +#else static const struct { u8 buffer[12]; } tpm_resume_cmd = { @@ -229,6 +234,7 @@ static void init_vboot(int bootmode) printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result); hard_reset(); } +#endif void init_chromeos(int bootmode) { -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
