Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1761
-gerrit commit dc25feaecd35b2a400db0f0cc6067f0ea3154215 Author: Duncan Laurie <[email protected]> Date: Mon Oct 1 13:31:25 2012 -0700 Make EmeraldLake2 work again Fix GPIO exporting for new Vboot for oprom-matters GPIO and to make the power button static. Change-Id: Ic042c428a1d43512228c686121fa057d876606e1 Signed-off-by: Duncan Laurie <[email protected]> --- src/mainboard/intel/emeraldlake2/Kconfig | 2 +- src/mainboard/intel/emeraldlake2/chromeos.c | 19 ++++++++++++------- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index aaca694..ca68725 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MMCONF_SUPPORT select HAVE_SMI_HANDLER select GFXUMA - #select CHROMEOS + select CHROMEOS select EXTERNAL_MRC_BLOB config MAINBOARD_DIR diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index 6077ac7..1c5913a 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -31,7 +31,7 @@ #ifndef __PRE_RAM__ #include <arch/coreboot_tables.h> -#define GPIO_COUNT 5 +#define GPIO_COUNT 6 #define ACTIVE_LOW 0 #define ACTIVE_HIGH 1 @@ -39,7 +39,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe; - u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1); if (!gpio_base) return; @@ -66,21 +65,27 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Developer: GPIO57 */ gpios->gpios[2].port = 57; - gpios->gpios[2].polarity = ACTIVE_HIGH; + gpios->gpios[2].polarity = ACTIVE_LOW; gpios->gpios[2].value = (gp_lvl2 >> (57-32)) & 1; strncpy((char *)gpios->gpios[2].name,"developer", GPIO_MAX_NAME_LENGTH); /* Hard code the lid switch GPIO to open. */ - gpios->gpios[3].port = 100; + gpios->gpios[3].port = -1; gpios->gpios[3].polarity = ACTIVE_HIGH; gpios->gpios[3].value = 1; strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH); /* Power Button */ - gpios->gpios[4].port = 101; - gpios->gpios[4].polarity = ACTIVE_LOW; - gpios->gpios[4].value = (gen_pmcon_1 >> 9) & 1; + gpios->gpios[4].port = -1; + gpios->gpios[4].polarity = ACTIVE_HIGH; + gpios->gpios[4].value = 0; strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH); + + /* Did we load the VGA option ROM? */ + gpios->gpios[5].port = -1; + gpios->gpios[5].polarity = ACTIVE_HIGH; + gpios->gpios[5].value = oprom_is_loaded; + strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH); } #endif -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
