the following patch was just integrated into master:
commit f5a11aa82f66a77a4b79b602604a8516ca187c3b
Author: Marc Jones <[email protected]>
Date: Thu Oct 25 14:01:37 2012 -0600
Initialize the VMX MSR
The VMX MSR may come up with random values and needs to be
initialized to zero. This was done incorrectly in finalize_smm.
It must be done on a per core basis in the general CPU init.
This touches all Sandybridge and Ivybridge configs.
Change-Id: I015352d0f8e2ebe55ac0a5e9c5bbff83bd2ff86b
Signed-off-by: Marc Jones <[email protected]>
Reviewed-on: http://review.coreboot.org/1794
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <[email protected]>
Build-Tested: build bot (Jenkins) at Mon Nov 12 02:16:56 2012, giving +1
Reviewed-By: Stefan Reinauer <[email protected]> at Mon Nov 12
03:27:58 2012, giving +2
See http://review.coreboot.org/1794 for details.
-gerrit
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