Kyösti Mälkki ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1859
-gerrit commit c1f54cf79aae4429b6379185ca61fd7b60ffe7fc Author: Kyösti Mälkki <[email protected]> Date: Wed Nov 14 08:23:51 2012 +0200 Switch to auto-generated bootblock_devices.h CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT etc. Kconfig options explicitly specified a set of bootblock.c files. The same files are now included in bootblock_devices.h, so the excplicit Kconfig options are be removed. The generated file bootblock_devices.h now declares bootblock_mainboard_init() function, so the code left here is for explanation only. Change-Id: Idd2597d21febebd98def74a52c9d44e1a811d956 Signed-off-by: Kyösti Mälkki <[email protected]> --- src/arch/x86/Kconfig | 9 ------- src/arch/x86/Makefile.inc | 7 +++--- src/arch/x86/include/bootblock_common.h | 40 ++++++++++++++++++-------------- src/cpu/intel/model_206ax/Kconfig | 4 ---- src/mainboard/hp/dl165_g6_fam10/Kconfig | 4 ---- src/northbridge/amd/amdfam10/Kconfig | 4 ---- src/northbridge/amd/amdk8/Kconfig | 4 ---- src/southbridge/amd/agesa/hudson/Kconfig | 5 ---- src/southbridge/amd/amd8111/Kconfig | 4 ---- src/southbridge/amd/cimx/sb700/Kconfig | 3 --- src/southbridge/amd/cimx/sb800/Kconfig | 3 --- src/southbridge/amd/cimx/sb900/Kconfig | 4 ---- src/southbridge/amd/sb600/Kconfig | 3 --- src/southbridge/amd/sb700/Kconfig | 4 ---- src/southbridge/amd/sb800/Kconfig | 5 ---- src/southbridge/broadcom/bcm5785/Kconfig | 4 ---- src/southbridge/intel/bd82x6x/Kconfig | 4 ---- src/southbridge/intel/i82371eb/Kconfig | 5 ---- src/southbridge/intel/i82801gx/Kconfig | 4 ---- src/southbridge/nvidia/ck804/Kconfig | 4 ---- src/southbridge/nvidia/mcp55/Kconfig | 4 ---- src/southbridge/rdc/r8610/Kconfig | 4 ---- src/southbridge/sis/sis966/Kconfig | 4 ---- src/southbridge/via/vt8237r/Kconfig | 4 ---- 24 files changed, 26 insertions(+), 114 deletions(-) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 0d58403..7232689 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -73,12 +73,6 @@ config PC80_SYSTEM config HAS_MAINBOARD_BOOTBLOCK def_bool n -config BOOTBLOCK_MAINBOARD_INIT - string - -config BOOTBLOCK_NORTHBRIDGE_INIT - string - config HAVE_CMOS_DEFAULT def_bool n @@ -86,9 +80,6 @@ config CMOS_DEFAULT_FILE string depends on HAVE_CMOS_DEFAULT -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - config HAVE_ARCH_MEMSET bool default y diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6ac1fc9..4223011 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -320,11 +320,10 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ -$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) +$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objgenerated)/bootblock_devices.h $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ - $< > $(objgenerated)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@ + $(CC) $(INCLUDES) -I$(objgenerated) -MM -MT$@ $< > [email protected] + $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) -I$(objgenerated) $< -o $@ $(objgenerated)/bootblock_devices.h: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb $(objutil)/sconfig/sconfig @printf " SCONFIG $(subst $(src)/,,$(<)) (bootblock)\n" diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h index ca283f5..29e07f5 100644 --- a/src/arch/x86/include/bootblock_common.h +++ b/src/arch/x86/include/bootblock_common.h @@ -1,33 +1,39 @@ #include <cpu/x86/lapic/boot_cpu.c> #include <arch/cbfs.h> -#ifdef CONFIG_BOOTBLOCK_CPU_INIT -#include CONFIG_BOOTBLOCK_CPU_INIT -#endif -#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#endif -#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#endif +/* + * Compiler for bootblock is ROMCC and it can only build from a single source + * file. To overcome this limitation, sconfig utility includes all the required + * bootblock.c files in a single file named bootblock_devices.h. + * + * In this file sconfig utility creates bootblock_mainboard_init(), which + * calls the individual chips bootblock_xxx_init() functions in the order + * chips appear in devicetree.cb. If this does not meet requirements, use option + * HAS_MAINBOARD_BOOTBLOCK and override it in mainboard/x/x/bootblock.c. + */ + +#include "bootblock_devices.h" + +#if 0 /* non-functional sample of bootblock_devices.h */ + +#include "cpu/vendor/part/bootblock.c" +#include "northbridge/vendor/part/bootblock.c" +#include "southbridge/vendor/part/bootblock.c" -#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT -#include CONFIG_BOOTBLOCK_MAINBOARD_INIT +#if CONFIG_HAS_MAINBOARD_BOOTBLOCK +#include "mainboard/vendor/part/bootblock.c" #else static void bootblock_mainboard_init(void) { -#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT bootblock_northbridge_init(); -#endif -#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT bootblock_southbridge_init(); -#endif -#ifdef CONFIG_BOOTBLOCK_CPU_INIT bootblock_cpu_init(); -#endif } #endif +#endif /* non-functional sample of bootblock_devices.h */ + + #if CONFIG_USE_OPTION_TABLE #include <pc80/mc146818rtc.h> diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 5b3f893..2bca201 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -16,10 +16,6 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE -config BOOTBLOCK_CPU_INIT - string - default "cpu/intel/model_206ax/bootblock.c" - config SERIAL_CPU_INIT bool default n diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig index 21353b7..547cc21 100644 --- a/src/mainboard/hp/dl165_g6_fam10/Kconfig +++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig @@ -91,10 +91,6 @@ config HEAP_SIZE hex default 0xc0000 -config BOOTBLOCK_MAINBOARD_INIT - string - default "mainboard/hp/dl165_g6_fam10/bootblock.c" - config MMCONF_SUPPORT_DEFAULT bool default y diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index a14339e..633d378 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -59,10 +59,6 @@ config MMCONF_BUS_NUMBER int default 256 -config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/amd/amdfam10/bootblock.c" - config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 9ea5404..ddb2377 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -55,10 +55,6 @@ config HW_MEM_HOLE_SIZE_AUTO_INC bool default n -config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/amd/amdk8/bootblock.c" - config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 4afe377..09cab50 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -23,11 +23,6 @@ config SOUTHBRIDGE_AMD_AGESA_HUDSON select HAVE_USBDEBUG select TINY_BOOTBLOCK -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/agesa/hudson/bootblock.c" - depends on SOUTHBRIDGE_AMD_AGESA_HUDSON - config SOUTHBRIDGE_AMD_HUDSON_SKIP_ISA_DMA_INIT bool default n diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig index fd244c8..03d0f29 100644 --- a/src/southbridge/amd/amd8111/Kconfig +++ b/src/southbridge/amd/amd8111/Kconfig @@ -22,7 +22,3 @@ config SOUTHBRIDGE_AMD_AMD8111 select IOAPIC select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/amd8111/bootblock.c" - depends on SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig index f139450..95993cf 100644 --- a/src/southbridge/amd/cimx/sb700/Kconfig +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -47,9 +47,6 @@ config ACPI_SCI_IRQ default 0x9 help Set SCI IRQ to 9. -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb700/bootblock.c" config REDIRECT_SBCIMX_TRACE_TO_SERIAL bool "Redirect AMD Southbridge CIMX Trace to serial console" diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 4ac2094..b45327a 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -24,9 +24,6 @@ config SOUTHBRIDGE_AMD_CIMX_SB800 select AMD_SB_CIMX if SOUTHBRIDGE_AMD_CIMX_SB800 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb800/bootblock.c" config ENABLE_IDE_COMBINED_MODE bool "Enable SATA IDE combined mode" diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig index acc369e..6906d31 100755 --- a/src/southbridge/amd/cimx/sb900/Kconfig +++ b/src/southbridge/amd/cimx/sb900/Kconfig @@ -49,10 +49,6 @@ config ACPI_SCI_IRQ help Set SCI IRQ to 9. -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb900/bootblock.c" - config S3_VOLATILE_POS hex "S3 volatile storage position" default 0xFFFF0000 diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig index 51d8310..98f07db 100644 --- a/src/southbridge/amd/sb600/Kconfig +++ b/src/southbridge/amd/sb600/Kconfig @@ -24,9 +24,6 @@ config SOUTHBRIDGE_AMD_SB600 select HAVE_HARD_RESET if SOUTHBRIDGE_AMD_SB600 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/sb600/bootblock.c" config EHCI_BAR hex diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig index 924e2df..b4c95c9 100644 --- a/src/southbridge/amd/sb700/Kconfig +++ b/src/southbridge/amd/sb700/Kconfig @@ -33,10 +33,6 @@ config SOUTHBRIDGE_AMD_SUBTYPE_SP5100 bool default n -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/sb700/bootblock.c" - config SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT bool default n diff --git a/src/southbridge/amd/sb800/Kconfig b/src/southbridge/amd/sb800/Kconfig index 592f9a7..5490c56 100644 --- a/src/southbridge/amd/sb800/Kconfig +++ b/src/southbridge/amd/sb800/Kconfig @@ -23,11 +23,6 @@ config SOUTHBRIDGE_AMD_SB800 select HAVE_USBDEBUG select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/sb800/bootblock.c" - depends on SOUTHBRIDGE_AMD_SB800 - config SOUTHBRIDGE_AMD_SB800_SKIP_ISA_DMA_INIT bool default n diff --git a/src/southbridge/broadcom/bcm5785/Kconfig b/src/southbridge/broadcom/bcm5785/Kconfig index d72afd8..286c19b 100644 --- a/src/southbridge/broadcom/bcm5785/Kconfig +++ b/src/southbridge/broadcom/bcm5785/Kconfig @@ -2,7 +2,3 @@ config SOUTHBRIDGE_BROADCOM_BCM5785 bool select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/broadcom/bcm5785/bootblock.c" - depends on SOUTHBRIDGE_BROADCOM_BCM5785 diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index e5a6270..a285bf6 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -44,10 +44,6 @@ config EHCI_DEBUG_OFFSET hex default 0xa0 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/intel/bd82x6x/bootblock.c" - config SERIRQ_CONTINUOUS_MODE bool default n diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index 7e5109a..a5c5eb8 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -2,8 +2,3 @@ config SOUTHBRIDGE_INTEL_I82371EB bool select HAVE_ACPI_RESUME if HAVE_ACPI_TABLES -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/intel/i82371eb/bootblock.c" - depends on SOUTHBRIDGE_INTEL_I82371EB - diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 4ce6184..868a8cf 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -39,10 +39,6 @@ config USBDEBUG_DEFAULT_PORT int default 1 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/intel/i82801gx/bootblock.c" - config HPET_MIN_TICKS hex default 0x80 diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig index b6f718e..287dffe 100644 --- a/src/southbridge/nvidia/ck804/Kconfig +++ b/src/southbridge/nvidia/ck804/Kconfig @@ -6,10 +6,6 @@ config SOUTHBRIDGE_NVIDIA_CK804 if SOUTHBRIDGE_NVIDIA_CK804 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/nvidia/ck804/bootblock.c" - config EHCI_BAR hex default 0xfef00000 diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig index cd6009d..2c29267 100644 --- a/src/southbridge/nvidia/mcp55/Kconfig +++ b/src/southbridge/nvidia/mcp55/Kconfig @@ -6,10 +6,6 @@ config SOUTHBRIDGE_NVIDIA_MCP55 if SOUTHBRIDGE_NVIDIA_MCP55 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/nvidia/mcp55/bootblock.c" - config EHCI_BAR hex default 0xfef00000 diff --git a/src/southbridge/rdc/r8610/Kconfig b/src/southbridge/rdc/r8610/Kconfig index e9941f0..b6418eb 100644 --- a/src/southbridge/rdc/r8610/Kconfig +++ b/src/southbridge/rdc/r8610/Kconfig @@ -20,7 +20,3 @@ config SOUTHBRIDGE_RDC_R8610 bool -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/rdc/r8610/bootblock.c" - depends on SOUTHBRIDGE_RDC_R8610 diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig index 03dd6b1..4ae16c6 100644 --- a/src/southbridge/sis/sis966/Kconfig +++ b/src/southbridge/sis/sis966/Kconfig @@ -4,10 +4,6 @@ config SOUTHBRIDGE_SIS_SIS966 select HAVE_USBDEBUG select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/sis/sis966/bootblock.c" if SOUTHBRIDGE_SIS_SIS966 - config EHCI_BAR hex default 0xfef00000 if SOUTHBRIDGE_SIS_SIS966 diff --git a/src/southbridge/via/vt8237r/Kconfig b/src/southbridge/via/vt8237r/Kconfig index 8deea92..36cc208 100644 --- a/src/southbridge/via/vt8237r/Kconfig +++ b/src/southbridge/via/vt8237r/Kconfig @@ -34,8 +34,4 @@ config EPIA_VT8237R_INIT bool default n -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/via/vt8237r/bootblock.c" - endif -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
