Dave Frodin ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1876
-gerrit commit 163b7b531352ae162c06b82ba38c57b04213a4af Author: Dave Frodin <[email protected]> Date: Fri Nov 16 14:16:33 2012 -0700 Persimmon: Disable the unused GPP PCIe clocks Change-Id: I4128af7912bec090bbd48acc1b20d0452e7a4a28 Signed-off-by: Dave Frodin <[email protected]> --- src/mainboard/amd/persimmon/mainboard.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index 4c52dc3..5edacd3 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -28,6 +28,7 @@ #include "BiosCallOuts.h" #include <cpu/amd/agesa/s3_resume.h> #include <cpu/amd/mtrr.h> +#include "SBPLATFORM.h" void set_pcie_reset(void); void set_pcie_dereset(void); @@ -63,6 +64,15 @@ static void persimmon_enable(device_t dev) #if CONFIG_HAVE_ACPI_RESUME acpi_slp_type = acpi_get_sleep_type(); #endif + + /* enable GPP CLK0 thru CLK1 */ + /* disable GPP CLK2 thru SLT_GFX_CLK */ + u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); + *(misc_mem_clk_cntrl + 0) = 0xFF; + *(misc_mem_clk_cntrl + 1) = 0x00; + *(misc_mem_clk_cntrl + 2) = 0x00; + *(misc_mem_clk_cntrl + 3) = 0x00; + *(misc_mem_clk_cntrl + 4) = 0x00; } struct chip_operations mainboard_ops = { -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
