Thanks for all the input... from what everyone on here is saying it seems to me like it will be another big, long project with lots for me to learn. :)
The best implementation would be along the lines of a 486 chip connected to FPGA(?). Then implement all I/O in the FPGA. Is that what the consensus is? Cheers, Rex -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
