Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2021
-gerrit commit fcbbff1e28a4b978339bdf352e9d83364eb04f36 Author: Stefan Reinauer <[email protected]> Date: Tue Dec 11 12:49:32 2012 -0800 Fix UART8250 console prototypes and disable IO mapped UARTs on ARMV7 per default Change-Id: I712c4677cbc8519323970556718f9bb6327d83c8 Signed-off-by: Stefan Reinauer <[email protected]> --- src/Kconfig | 3 ++- src/include/uart8250.h | 7 +++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index d005d83..0a94ed8 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -261,7 +261,8 @@ source src/console/Kconfig # This should default to N and be set by SuperI/O drivers that have an UART config HAVE_UART_IO_MAPPED bool - default y + default y if ARCH_X86 + default n if ARCH_ARMV7 config HAVE_UART_MEMORY_MAPPED bool diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 8457530..b00ff48 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -115,6 +115,7 @@ #define UART_LCS CONFIG_TTYS0_LCS #ifndef __ROMCC__ +#if CONFIG_CONSOLE_SERIAL8250 unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); @@ -125,6 +126,8 @@ void uart8250_tx_flush(unsigned base_port); */ void uart8250_init(unsigned base_port, unsigned divisor); void uart_init(void); +#endif +#if CONFIG_CONSOLE_SERIAL8250MEM void uartmem_init(void); /* and the same for memory mapped uarts */ @@ -136,13 +139,13 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor); u32 uart_mem_init(void); u32 uartmem_getbaseaddr(void); -#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE && \ - CONFIG_CONSOLE_SERIAL8250MEM +#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE /* and special init for OXPCIe based cards */ extern int oxford_oxpcie_present; void oxford_init(void); #endif +#endif #endif /* __ROMCC__ */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot

