the following patch was just integrated into master:
commit b7e05358621344e0d777853c34960944d680f804
Author: Ronald G. Minnich <[email protected]>
Date: Tue Jan 29 14:35:35 2013 -0800
Exynos5250: Get DDR3 working by changing what is compiled and add a function
This is a minor set of changes to get DDR3 going.
Move compilation of DDR3 startup to the romstage. Fix a prototype that
was missing a void. Remove a function that is overly flexible, and
even though it is overly flexible only actually can handle one type of
RAM. Mainboards only support one type of DRAM, so create a function
to explicitly initialize the type of DDR we have -- DDR3.
With these changes, and the previous changes, google snow is ready to run
the ramstage.
Change-Id: I37e0ab0d2dbc1dd121fb175386a46bc2fb1285e5
Signed-off-by: Ronald G. Minnich <[email protected]>
Reviewed-on: http://review.coreboot.org/2224
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <[email protected]>
Reviewed-by: Paul Menzel <[email protected]>
Reviewed-by: David Hendricks <[email protected]>
Build-Tested: build bot (Jenkins) at Wed Jan 30 01:21:05 2013, giving +1
Reviewed-By: Stefan Reinauer <[email protected]> at Wed Jan 30
02:39:02 2013, giving +2
Reviewed-By: David Hendricks <[email protected]> at Wed Jan 30 21:39:22
2013, giving +2
See http://review.coreboot.org/2224 for details.
-gerrit
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