Jens Rottmann ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2445
-gerrit commit b6ae9a213bf1aeb1e18dc07b8f3fca4bebdfff35 Author: Jens Rottmann <[email protected]> Date: Mon Feb 18 18:56:48 2013 +0100 Inagua: fix simple copy & paste error in code to reset PCIe slots Looking at AssertSlotReset, the comments and all other 'case's it's obvious this is a simple copy&paste error where someone just forgot to change one occurrance of the GPIO nr. Also the Inagua schematics show that GPIO02 is what they really meant. Change-Id: I6b9a3d473245fa27604b2f148a730290277a88ed Signed-off-by: Jens Rottmann <[email protected]> --- src/mainboard/amd/inagua/BiosCallOuts.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c b/src/mainboard/amd/inagua/BiosCallOuts.c index 3c38239..88bb1be 100644 --- a/src/mainboard/amd/inagua/BiosCallOuts.c +++ b/src/mainboard/amd/inagua/BiosCallOuts.c @@ -594,7 +594,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) Status = AGESA_SUCCESS; break; case DeassertSlotReset: - Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); + Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 |= BIT6 ; Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Status = AGESA_SUCCESS; -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
