the following patch was just integrated into master:
commit 7fcbbb09fd788a9a1791c2abab96359ce960a2cc
Author: Konstantin Aladyshev <[email protected]>
Date:   Wed Mar 6 19:58:38 2013 +0400

    AGESA: Fix bug in AMD_DISABLE_STACK_FAMILY_HOOK_F15
    
    _RDMSR instruction loads the contents of a 64-bit model specific register 
(MSR)
    specified in the ECX register into registers EDX:EAX.
    The EDX register is loaded with the high-order 32 bits of the MSR
    and the EAX register is loaded with the low-order 32 bits.
    
    EDX:EAX = MSR[ECX]
    
    So bit 49 will be contained in EDX register.
    
    Buggy code instead of bit 49 (CombineCr0Cd) sets bit [49-32=17] 
(PfcStrideDis).
    PfcStrideDis bit disables stride prefetch generation. This leads to memory
    bandwidth loss.
    
    _________
    
    Supermicro H8QGI board
    
    After applying this change i observed huge memory bandwidth increase in 
tests
    that runs on small amount of cores. But unfortunately it doesn't affect
    overall bandwidth results on 4P system with 48 cores.
    So i think that in this system leading limiting factor is
    AMD HT-ASSIST feature (Probe filter).
    
    But right now it is not working. System stucks in Linux boot. I have done
    some experiments and figured out that stuck happens when system have cores 
in
    compute unit (CU) other than CU with BSC (boot strap core).
    CU is two cores (primary and seconary) that shares some things (L2 cache, 
FPU ...)
    So with probe filter i can boot Linux with one (BSC)
    or two (BSC + secondary core in its CU) cores.
    And with this configuration i can see memory bandwidth on 1 core (or two 
cores)
    close to original bios.
    
    Change-Id: I5a95f5b753d600c70d3c93d36fecc687610c61cd
    Signed-off-by: Konstantin Aladyshev <[email protected]>
    Reviewed-on: http://review.coreboot.org/2588
    Tested-by: build bot (Jenkins)
    Reviewed-by: Marc Jones <[email protected]>

Build-Tested: build bot (Jenkins) at Wed Mar  6 18:21:11 2013, giving +1
Reviewed-By: Marc Jones <[email protected]> at Wed Mar  6 19:38:50 2013, 
giving +2
See http://review.coreboot.org/2588 for details.

-gerrit

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