On Mon, 29 Apr 2013 12:40:18 -0700 David Hendricks <[email protected]> wrote:
> For romstage, > we use a technique called "cache-as-RAM" to exploit the processor > cache (or embedded SRAM, if available) as a temporary location to set > up a stack and run C code. Vladimir pointed to me(on IRC) that romcc is not ported to MIPS yet. Denis. -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
