Hi, I am working on a Micros WS4 that's built around the AMD SC3200 (the GX1 and companion chip integrated into one silicon) and boots Windows CE from ROM. I need to turn it into a generic purpose PC, so I am trying to extend Coreboot to handle it. The SC3200 datasheet is at http://www.manualslib.com/manual/5433/Amd-Geode-Sc3200.html Since Coreboot already supports the GX1, I hope it won't take too much time to support this board.
The attached patches are the first steps to allow hardware discovery on this machine. The first patch adds mingw32ce support to superiotool: - direct inb/outb allowed under WinCE without iopl/ioperm - to handle I/O, sys/io.h is copied from Fedora, slightly modified and renamed to mingwce-io.h - executable suffix support is added to the Makefile - a script to compile superiotool.exe for WinCE CONFIG_PCI=yes is also supported with zlib support and I have modified sources for pciutils-3.1.9 (lspci only) and zlib-1.2.7. Now I can run lspci and superiotool under Windows CE 4.2 found in the ROM of this machine, superiotool reports NSC 87360 and the SC3200 on port 0x2e and 0x15c, respectively. The x86mingw32ce distribution is 0.59.1 from http://cegcc.sourceforge.net/ but it needs an extra symlink libgmp.so.3 -> libgmp.so on my machine, currently Fedora 19 beta. The second and third patches add support for the internal SuperI/O chip built into the AMD SC3200 chip to superiotool and src/superio, respectively. Best regards, Zoltán Böszörményi
commit bdfcf31d2b5c53bdb27f2e7529057fb83ab572ca Author: Böszörményi Zoltán <[email protected]> Date: Sun May 26 16:49:24 2013 +0200 Add WinCE (mingw32ce) support for superiotool. diff --git a/.gitignore b/.gitignore index e57e32f..2da6cc4 100644 --- a/.gitignore +++ b/.gitignore @@ -78,6 +78,7 @@ util/romcc/romcc util/romcc/tests/fail_test*.S util/romcc/tests/*.S-O2-mmmx util/superiotool/superiotool +util/superiotool/superiotool.exe util/vgabios/testbios documentation/*.aux diff --git a/util/superiotool/Makefile b/util/superiotool/Makefile index 900b8ae..3ebf6d5 100644 --- a/util/superiotool/Makefile +++ b/util/superiotool/Makefile @@ -30,7 +30,6 @@ VERSION := -D'SUPERIOTOOL_VERSION="$(shell git describe 2>/dev/null)"' CFLAGS += -O2 -Wall -Wstrict-prototypes -Wundef -Wstrict-aliasing \ -Werror-implicit-function-declaration -ansi -pedantic $(VERSION) -LDFLAGS += -lz OBJS = superiotool.o serverengines.o ali.o fintek.o ite.o nsc.o nuvoton.o \ smsc.o winbond.o infineon.o @@ -52,28 +51,32 @@ endif # Support for PCI-attached "Super I/Os" (e.g. in VIA VT82686A/B). CONFIG_PCI = yes +CONFIG_PCI_ZLIB = yes ifeq ($(CONFIG_PCI), yes) CFLAGS += -DPCI_SUPPORT LIBS += -lpci +ifeq ($(CONFIG_PCI_ZLIB), yes) +LIBS += -lz +endif OBJS += pci.o via.o amd.o endif -all: $(PROGRAM) +all: $(PROGRAM)$(EXEEXT) superiotool.o: *.c superiotool.h -$(PROGRAM): $(OBJS) superiotool.h - $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS) +$(PROGRAM)$(EXEEXT): $(OBJS) superiotool.h + $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEEXT) $(OBJS) $(LIBS) -install: $(PROGRAM) +install: $(PROGRAM)$(EXEEXT) mkdir -p $(DESTDIR)$(PREFIX)/sbin - $(INSTALL) $(PROGRAM) $(DESTDIR)$(PREFIX)/sbin + $(INSTALL) $(PROGRAM)$(EXEEXT) $(DESTDIR)$(PREFIX)/sbin mkdir -p $(DESTDIR)$(PREFIX)/share/man/man8 $(INSTALL) $(PROGRAM).8 $(DESTDIR)$(PREFIX)/share/man/man8 clean: - rm -f $(PROGRAM) *.o + rm -f $(PROGRAM)$(EXEEXT) *.o .PHONY: all install clean diff --git a/util/superiotool/compile-mingwce.sh b/util/superiotool/compile-mingwce.sh new file mode 100755 index 0000000..17da968 --- /dev/null +++ b/util/superiotool/compile-mingwce.sh @@ -0,0 +1,3 @@ +#!/bin/bash + +make CC=/opt/x86mingw32ce/bin/i386-mingw32ce-gcc CONFIG_PCI=yes CONFIG_PCI_ZLIB=yes EXEEXT=.exe $1 diff --git a/util/superiotool/mingwce-io.h b/util/superiotool/mingwce-io.h new file mode 100644 index 0000000..b23b0bd --- /dev/null +++ b/util/superiotool/mingwce-io.h @@ -0,0 +1,201 @@ +/* + * This file was copied from GLIBC on Fedora 18 and slightly modified. + * Windows CE allows direct I/O access and doesn't have/need iopl()/ioperm(). + */ + +/* Copyright (C) 1996-2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _SYS_IO_H +#define _SYS_IO_H 1 + +/* + * There is no <features.h> in mingw32ce +#include <features.h> + */ + +/* __BEGIN_DECLS */ + +#ifndef DONT_DEFINE_IOPL + +/* If TURN_ON is TRUE, request for permission to do direct i/o on the + port numbers in the range [FROM,FROM+NUM-1]. Otherwise, turn I/O + permission off for that range. This call requires root privileges. + + Portability note: not all Linux platforms support this call. Most + platforms based on the PC I/O architecture probably will, however. + E.g., Linux/Alpha for Alpha PCs supports this. */ +static inline int ioperm (unsigned long int __from, unsigned long int __num, + int __turn_on) +{ + return 0; +} + +/* Set the I/O privilege level to LEVEL. If LEVEL>3, permission to + access any I/O port is granted. This call requires root + privileges. */ +static inline int iopl (int __level) +{ + return 0; +} + +#endif + +#if defined __GNUC__ && __GNUC__ >= 2 + +static __inline unsigned char +inb (unsigned short int __port) +{ + unsigned char _v; + + __asm__ __volatile__ ("inb %w1,%0":"=a" (_v):"Nd" (__port)); + return _v; +} + +static __inline unsigned char +inb_p (unsigned short int __port) +{ + unsigned char _v; + + __asm__ __volatile__ ("inb %w1,%0\noutb %%al,$0x80":"=a" (_v):"Nd" (__port)); + return _v; +} + +static __inline unsigned short int +inw (unsigned short int __port) +{ + unsigned short _v; + + __asm__ __volatile__ ("inw %w1,%0":"=a" (_v):"Nd" (__port)); + return _v; +} + +static __inline unsigned short int +inw_p (unsigned short int __port) +{ + unsigned short int _v; + + __asm__ __volatile__ ("inw %w1,%0\noutb %%al,$0x80":"=a" (_v):"Nd" (__port)); + return _v; +} + +static __inline unsigned int +inl (unsigned short int __port) +{ + unsigned int _v; + + __asm__ __volatile__ ("inl %w1,%0":"=a" (_v):"Nd" (__port)); + return _v; +} + +static __inline unsigned int +inl_p (unsigned short int __port) +{ + unsigned int _v; + __asm__ __volatile__ ("inl %w1,%0\noutb %%al,$0x80":"=a" (_v):"Nd" (__port)); + return _v; +} + +static __inline void +outb (unsigned char __value, unsigned short int __port) +{ + __asm__ __volatile__ ("outb %b0,%w1": :"a" (__value), "Nd" (__port)); +} + +static __inline void +outb_p (unsigned char __value, unsigned short int __port) +{ + __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80": :"a" (__value), + "Nd" (__port)); +} + +static __inline void +outw (unsigned short int __value, unsigned short int __port) +{ + __asm__ __volatile__ ("outw %w0,%w1": :"a" (__value), "Nd" (__port)); + +} + +static __inline void +outw_p (unsigned short int __value, unsigned short int __port) +{ + __asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80": :"a" (__value), + "Nd" (__port)); +} + +static __inline void +outl (unsigned int __value, unsigned short int __port) +{ + __asm__ __volatile__ ("outl %0,%w1": :"a" (__value), "Nd" (__port)); +} + +static __inline void +outl_p (unsigned int __value, unsigned short int __port) +{ + __asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80": :"a" (__value), + "Nd" (__port)); +} + +static __inline void +insb (unsigned short int __port, void *__addr, unsigned long int __count) +{ + __asm__ __volatile__ ("cld ; rep ; insb":"=D" (__addr), "=c" (__count) + :"d" (__port), "0" (__addr), "1" (__count)); +} + +static __inline void +insw (unsigned short int __port, void *__addr, unsigned long int __count) +{ + __asm__ __volatile__ ("cld ; rep ; insw":"=D" (__addr), "=c" (__count) + :"d" (__port), "0" (__addr), "1" (__count)); +} + +static __inline void +insl (unsigned short int __port, void *__addr, unsigned long int __count) +{ + __asm__ __volatile__ ("cld ; rep ; insl":"=D" (__addr), "=c" (__count) + :"d" (__port), "0" (__addr), "1" (__count)); +} + +static __inline void +outsb (unsigned short int __port, const void *__addr, + unsigned long int __count) +{ + __asm__ __volatile__ ("cld ; rep ; outsb":"=S" (__addr), "=c" (__count) + :"d" (__port), "0" (__addr), "1" (__count)); +} + +static __inline void +outsw (unsigned short int __port, const void *__addr, + unsigned long int __count) +{ + __asm__ __volatile__ ("cld ; rep ; outsw":"=S" (__addr), "=c" (__count) + :"d" (__port), "0" (__addr), "1" (__count)); +} + +static __inline void +outsl (unsigned short int __port, const void *__addr, + unsigned long int __count) +{ + __asm__ __volatile__ ("cld ; rep ; outsl":"=S" (__addr), "=c" (__count) + :"d" (__port), "0" (__addr), "1" (__count)); +} + +#endif /* GNU C */ + +/* __END_DECLS */ +#endif /* _SYS_IO_H */ diff --git a/util/superiotool/superiotool.c b/util/superiotool/superiotool.c index 5869cbf..2813334 100644 --- a/util/superiotool/superiotool.c +++ b/util/superiotool/superiotool.c @@ -313,6 +313,7 @@ int main(int argc, char *argv[]) } } +#ifndef __COREDLL__ #if defined(__FreeBSD__) if ((io_fd = open("/dev/io", O_RDWR)) < 0) { perror("/dev/io"); @@ -323,6 +324,7 @@ int main(int argc, char *argv[]) printf("Superiotool must be run as root.\n"); exit(1); } +#endif print_version(); diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index d8dd928..624b933 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -29,7 +29,10 @@ #include <stdint.h> #include <string.h> #include <getopt.h> -#if defined(__GLIBC__) +#if defined(__COREDLL__) +#define DONT_DEFINE_IOPL 1 +#include "mingwce-io.h" +#elif defined(__GLIBC__) #include <sys/io.h> #endif #if (defined(__MACH__) && defined(__APPLE__))
commit 71981ccc3dd55c729f2f5001050aa1c0e60ac9a5 Author: Böszörményi Zoltán <[email protected]> Date: Sun May 26 17:01:24 2013 +0200 Add AMD SC3200 support to superiotool. diff --git a/util/superiotool/Makefile b/util/superiotool/Makefile index 3ebf6d5..e1a1b45 100644 --- a/util/superiotool/Makefile +++ b/util/superiotool/Makefile @@ -31,7 +31,7 @@ VERSION := -D'SUPERIOTOOL_VERSION="$(shell git describe 2>/dev/null)"' CFLAGS += -O2 -Wall -Wstrict-prototypes -Wundef -Wstrict-aliasing \ -Werror-implicit-function-declaration -ansi -pedantic $(VERSION) -OBJS = superiotool.o serverengines.o ali.o fintek.o ite.o nsc.o nuvoton.o \ +OBJS = superiotool.o serverengines.o ali.o amd2.o fintek.o ite.o nsc.o nuvoton.o \ smsc.o winbond.o infineon.o OS_ARCH = $(shell uname) diff --git a/util/superiotool/amd2.c b/util/superiotool/amd2.c new file mode 100644 index 0000000..f25f501 --- /dev/null +++ b/util/superiotool/amd2.c @@ -0,0 +1,98 @@ +/* + * This file is part of the superiotool project. + * + * Copyright (C) 2013 Zoltán Böszörményi <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "superiotool.h" + +#define CHIP_ID_REG 0x20 /* Super I/O ID (SID) / family */ +#define CHIP_REV_REG 0x27 /* Super I/O revision ID (SRID) */ + +static const struct superio_registers reg_table[] = { + {0xf5, "SC3200", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x27,EOT}, + {0xf5,MISC,MISC,NANA,EOT}}, + {0x0, "Real-time clock (RTC)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,0xf3,EOT}, + {MISC,0x00,0x70,0x00,0x72,0x08,0x00,0x04,0x04,0x00,0x00,0x00,0x00,EOT}}, + {0x1, "System wake-up control (SWC)", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT}, + {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}}, + {0x2, "COM3 / IR", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x03,0xe8,0x00,0x03,0x04,0x04,0x02,EOT}}, + {0x3, "COM1", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}}, + {0x5, "ACCESS.bus 1 (ACB)", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}}, + {0x6, "ACCESS.bus 2 (ACB)", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}}, + {0x7, "Parallel port", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}}, + {0x8, "COM2", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}}, + {EOT}}}, + {EOT} +}; + +void probe_idregs_amd2(uint16_t port) +{ + uint8_t id, rev; + + probing_for("AMD", "", port); + + OUTB(CHIP_ID_REG, port); + if (INB(port) != CHIP_ID_REG) { + if (verbose) + printf(NOTFOUND "port=0x%02x, port+1=0x%02x\n", + INB(port), INB(port + 1)); + return; + } + id = INB(port + 1); + + OUTB(CHIP_REV_REG, port); + if (INB(port) != CHIP_REV_REG) { + printf("Warning: Can't get chip revision. Setting to 0xff.\n"); + rev = 0xff; + } else { + rev = INB(port + 1); + } + + if (superio_unknown(reg_table, id)) { + if (verbose) + printf(NOTFOUND "sid=0x%02x, srid=0x%02x\n", id, rev); + return; + } + + printf("Found AMD %s (sid=0x%02x, srid=0x%02x) at 0x%x\n", + get_superio_name(reg_table, id), id, rev, port); + chip_found = 1; + + dump_superio("AMD", reg_table, port, id, LDN_SEL); +} + +void print_amd2_chips(void) +{ + print_vendor_chips("AMD", reg_table); +} diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 624b933..1e8772e 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -190,6 +190,10 @@ void print_ali_chips(void); void probe_idregs_amd(uint16_t port); void print_amd_chips(void); +/* amd2.c */ +void probe_idregs_amd2(uint16_t port); +void print_amd2_chips(void); + /* serverengines.c */ void probe_idregs_serverengines(uint16_t port); void print_serverengines_chips(void); @@ -252,6 +256,7 @@ static const struct { #endif {probe_idregs_serverengines, {0x2e, EOT}}, {probe_idregs_infineon, {0x2e, 0x4e, EOT}}, + {probe_idregs_amd2, {0x2e, 0x15c, EOT}}, }; /** Table of functions to print out supported Super I/O chips. */ @@ -271,6 +276,7 @@ static const struct { #endif {print_serverengines_chips}, {print_infineon_chips}, + {print_amd2_chips}, }; #endif
commit 1177b31252883f5b287617bb7ef5d892324cf8e1 Author: Böszörményi Zoltán <[email protected]> Date: Sun May 26 17:04:03 2013 +0200 Add AMD SC3200 support to src/superio. diff --git a/src/superio/Kconfig b/src/superio/Kconfig index 32e60bb..630f083 100644 --- a/src/superio/Kconfig +++ b/src/superio/Kconfig @@ -20,6 +20,7 @@ config SUPERIO_WANTS_14MHZ_CLOCK bool +source src/superio/amd/Kconfig source src/superio/fintek/Kconfig source src/superio/intel/Kconfig source src/superio/ite/Kconfig diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc index ff4d48f..26f93cf 100644 --- a/src/superio/Makefile.inc +++ b/src/superio/Makefile.inc @@ -17,6 +17,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +subdirs-y += amd subdirs-y += fintek subdirs-y += intel subdirs-y += ite diff --git a/src/superio/amd/Kconfig b/src/superio/amd/Kconfig new file mode 100644 index 0000000..1ab22e7 --- /dev/null +++ b/src/superio/amd/Kconfig @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Zoltán Böszörményi +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + + +config SUPERIO_AMD_SC3200 + bool diff --git a/src/superio/amd/Makefile.inc b/src/superio/amd/Makefile.inc new file mode 100644 index 0000000..215b221 --- /dev/null +++ b/src/superio/amd/Makefile.inc @@ -0,0 +1,20 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Zoltán Böszörményi +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +subdirs-y += sc3200 diff --git a/src/superio/amd/sc3200/Makefile.inc b/src/superio/amd/sc3200/Makefile.inc new file mode 100644 index 0000000..5ecf768 --- /dev/null +++ b/src/superio/amd/sc3200/Makefile.inc @@ -0,0 +1,21 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Zoltán Böszörményi <[email protected]> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ramstage-$(CONFIG_SUPERIO_AMD_SC3200) += superio.c diff --git a/src/superio/amd/sc3200/early_init.c b/src/superio/amd/sc3200/early_init.c new file mode 100644 index 0000000..6ea3db7 --- /dev/null +++ b/src/superio/amd/sc3200/early_init.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Zoltán Böszörményi <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include "sc3200.h" + +static void sc3200_disable_dev(device_t dev) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); +} + +static void sc3200_enable_dev(device_t dev, u16 iobase) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); +} diff --git a/src/superio/amd/sc3200/early_serial.c b/src/superio/amd/sc3200/early_serial.c new file mode 100644 index 0000000..f884cf9 --- /dev/null +++ b/src/superio/amd/sc3200/early_serial.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Zoltán Böszörményi <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include "sc3200.h" + +void sc3200_enable_serial(device_t dev, u16 iobase) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); +} + +void sc3200_enable_dev(device_t dev) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 1); +} diff --git a/src/superio/amd/sc3200/sc3200.h b/src/superio/amd/sc3200/sc3200.h new file mode 100644 index 0000000..a1838d0 --- /dev/null +++ b/src/superio/amd/sc3200/sc3200.h @@ -0,0 +1,38 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Zoltán Böszörményi <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_AMD_SC3200_SC3200_H +#define SUPERIO_AMD_SC3200_SC3200_H + +#define SC3200_RTC 0x00 /* RTC */ +#define SC3200_SWC 0x01 /* System Wake-Up Controller (SWC) */ +#define SC3200_SP3 0x02 /* Com3/IR */ +#define SC3200_SP1 0x03 /* Com1 */ +#define SC3200_ACB1 0x05 /* ACCESS.bus 1 */ +#define SC3200_ACB2 0x06 /* ACCESS.bus 2 */ +#define SC3200_PP 0x07 /* Parallel Port */ +#define SC3200_SP2 0x08 /* Com2 */ + +#if defined(__PRE_RAM__) +void sc3200_enable_serial(device_t dev, u16 iobase); +void sc3200_enable_dev(device_t dev); +#endif + +#endif diff --git a/src/superio/amd/sc3200/superio.c b/src/superio/amd/sc3200/superio.c new file mode 100644 index 0000000..70de2c2 --- /dev/null +++ b/src/superio/amd/sc3200/superio.c @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Zoltán Böszörményi <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/device.h> +#include <device/pnp.h> +#include <console/console.h> +#include <string.h> +#include <uart8250.h> +#include <stdlib.h> +#include "sc3200.h" + +static void init(device_t dev) +{ + if (!dev->enabled) + return; + + /* No KBC in this chip */ +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, SC3200_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07fe, 0}, {0x7fe, 0}, }, + { &ops, SC3200_SWC, PNP_IO0 | PNP_IRQ0, {0xfff0, 0}, }, + { &ops, SC3200_SP3, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, SC3200_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, SC3200_ACB1, PNP_IO0 | PNP_IRQ0, {0xfff8, 0}, }, + { &ops, SC3200_ACB2, PNP_IO0 | PNP_IRQ0, {0xfff8, 0}, }, + { &ops, SC3200_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x03f8, 0}, }, + { &ops, SC3200_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_amd_sc3200_ops = { + CHIP_NAME("AMD SC3200 Super I/O") + .enable_dev = enable_dev, +};
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