On Tue, Jun 11, 2013 at 9:33 AM, Константин Аладышев <[email protected]> wrote: > Hello! > > I have some troubles with southbridge i82801gx. > > I can boot Windows on my board, but S3 from OS doesn't work properly if i > resume with USB keyboard. > > In this case, i have Wake signal and coreboot starts to boot, but it stucks > with endless messages about SMI# "GPE0_STS: USB1": > > ... > > SMI# #0 > GPE0_STS: USB1 > > SMI# #0 > GPE0_STS: USB1 > > SMI# #0 > GPE0_STS: USB1 > > .... > > These messages come from file "\southbridge\intel\i82801gx\smihandler.c", > function "dump_gpe0_status". > > According to i82801gx datasheet: > ___ > > USB1_STS -- R/WC. Software clears this bit by writing a 1 to it. > > 0 = USB UHCI controller 1 does Not need to cause a wake. > > 1 = Set by hardware when USB UHCI controller 1 needs to cause a wake. Wake > event > > will be generated if the corresponding USB1_EN bit is set. > > ___ > > Clearing of GPE0_STS bits properly done in function reset_gpe0_status > > > /** > * @brief read and clear GPE0_STS > * @return GPE0_STS register > */ > static u32 reset_gpe0_status(void) > { > u32 reg32; > > reg32 = inl(pmbase + GPE0_STS); > /* set status bits are cleared by writing 1 to them */ > outl(reg32, pmbase + GPE0_STS); > > return reg32; > } > > So... i can't really understand, why does this SMI# appear again and again?
I assume the USB controller is still asserting its event. You'll need to clear USB1_EN in GPE0_EN. That should stop it. From what I can tell in the code GPE0_EN is only messed with when entering S5. So you may want to ensure that is cleared when setting up SMIs in coreboot. -Aaron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
