Well, I could not make the combination of 3830 + 3831 work with lumpy, see attached log.
Kyösti On Mon, 2013-07-29 at 15:22 -0700, Duncan Laurie wrote: > Just checking to make sure it was still populated... Now we know it is the > internal memory that is the issue. > > I suspect you may now be hitting the original issue that Stefan was trying > to fix with the systemagent binary changes ( > http://review.coreboot.org/#/c/3568/) that were reverted to get this > booting in the first place. > > Stefan has uploaded a patch that applies on top of the earlier reverted > patch. You could try to undo the revert, switch back to the systemagent-r6 > binary, and apply this new patch that was just uploaded: > http://review.coreboot.org/#/c/3831 <http://review.coreboot.org/#/c/3831/1>/ > (and maybe http://review.coreboot.org/#/c/3830/ too? Stefan?) > > Binary blobs ruin all the fun. > > -duncan > > > > On Mon, Jul 29, 2013 at 2:50 PM, John Lewis <jle...@johnlewis.ie> wrote: > > > So the DIMM slot happens to be empty/seated badly on both our Lumpy's? > > Don't think so. > > > > Mine acted like a brick with the SODIMM removed. > > > > John. > > > > > > Duncan Laurie <dlau...@chromium.org> wrote: > > > > Lumpy should have 2GB of on-board memory and a DIMM slot that comes with a > > 2GB DIMM. > > > > Coreboot seems to detect the on-board memory and finds the SPD binary for > > it, any chance the DIMM slot is empty? > > > > Memory Straps: > > - memory capacity 2GB > > - die revision 1 > > - vendor Samsung > > CBFS: Looking for 'spd.bin' starting from 0x700000. > > CBFS: Found file (offset=0x7dc000, len=1536). > > > > > > I think the console output should show a summary after the MRC binary > > runs, but the verbose CBFS output is overflowing the buffer: > > > > http://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/northbridge/intel/sandybridge/raminit.c;h=3eb2fb3e79c01cfc8d75319b1089bb1aafde9806;hb=HEAD#l168 > > > > -duncan > > > > > > > > On Mon, Jul 29, 2013 at 8:14 AM, Aaron Durbin <adur...@chromium.org>wrote: > > > >> Kyösti, > >> > >> I'm not certain it's just the last entry of the e820. mrc is just > >> seeing 2GiB of ram and setting it up that way. > >> > >> TOUUD 0x100600000 TOLUD 0x7f200000 TOM 0x80000000 > >> MEBASE 0x7f800000 > >> IGD decoded, subtracting 32M UMA and 2M GTT > >> TSEG base 0x7c800000 size 8M > >> Available memory below 4GB: 1992M > >> Available memory above 4GB: 6M > >> > >> -Aaron > >> > >> On Mon, Jul 29, 2013 at 10:04 AM, Kyösti Mälkki <kyosti.mal...@gmail.com> > >> wrote: > >> > On Mon, 2013-07-29 at 15:19 +0100, John Lewis wrote: > >> >> Where do I find/build cbmem binary? > >> >> > >> >> Please find attached dmesg. > >> > > >> > Hi > >> > > >> > I have same issue. Only about 2Gib of 4GiB installed shows. I had not > >> > noticed this until You pointed this out. Looks like a problem with the > >> > last entry coreboot creates in e820 memory map. > >> > > >> > > >> > This is from your dmesg, I see same with (close to) current master. > >> > > >> > [ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x00000001005fffff] > >> usable > >> > > >> > > >> > The coreboot image my Samsung 550 originally shipped with had this: > >> > > >> > [ 0.000000] BIOS-e820: 0000000100000000 - 000000014fe00000 (usable) > >> > > >> > > >> > > >> > Kyösti > >> > > >> > >> -- > >> coreboot mailing list: coreboot@coreboot.org > >> http://www.coreboot.org/mailman/listinfo/coreboot > >> > > > >
USB coreboot-4.0-4594-g459d29a-dirty Tue Jul 30 12:21:58 EEST 2013 starting... Setting up static southbridge registers... done. Disabling Watchdog reboot... done. Setting up static northbridge registers... done. Initializing Graphics... Back from sandybridge_early_initialization() SMBus controller enabled. Memory Straps: - memory capacity 2GB - die revision 1 - vendor Other CPU id(206a7): Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz AES supported, TXT NOT supported, VT supported PCH type: Unknown, device id: 1c49, rev id 5 Intel ME early init Intel ME firmware is ready ME: Requested 8MB UMA Starting UEFI PEI System Agent Read scrambler seed 0x0000f4e7 from CMOS 0x98 Read S3 scrambler seed 0x000065c1 from CMOS 0x9c No FMAP found at ffe70000. FMAP: area RW_MRC_CACHE not found find_current_mrc_cache_local: No valid MRC cache found. System Agent: Starting up... System Agent: Unsupported DDR3 frequence 0 (Supported are 800, 1067, 1333, 1600) Invalid memory frequency. Nonzero MRC return value.
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
