On 14.02.2014 13:38, Dmitry Bagryanskiy wrote: > //Enable Com3 > pci_write_config32(LPC_DEV, D31F0_GEN2_DEC, 0x001c02e1); > //Enable Com4 > pci_write_config32(LPC_DEV, D31F0_GEN3_DEC, 0x001c03e1); GEN*_DEC should not be set to com* ports. Instead there are dedicated bits for enabling decode of serial port ranges. Consult southbridge documentation.
signature.asc
Description: OpenPGP digital signature
-- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot

