I understand the arguments. It's worth remembering that coreboot has to date run on 5 different architectures. 4 of those used paging. The x86 has always been the outlier. Lack of paging has costs not discussed much. Rmodules would be a lot simpler if we had paging. We could make the code space readonly, which we should be doing anyway. We would have less fighting with the granularity and alignment restrictions of MTRRs. We could catch NULL pointers in hardware. These are clear benefits. And they all apply to the ramstage as well as other stages.
As to 64 bit ramstage, I see lots of benefits for my use cases, but I may be the only one. In any event, this is all stuff that can be measured, and I propose to implement and measure it. Then we can see. I'm not convinced that a few percent either way on code size is a showstopper. ron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
