So what this is saying is that we expect the ROM for coreboot to start at 64K. I hope this makes sense to you. Does this conflict with some qemu expectation, do you know?
ron On Mon, Aug 11, 2014 at 3:37 PM, Piotr Król <[email protected]> wrote: > On Mon, Aug 11, 2014 at 01:51:16PM -0700, ron minnich wrote: >> I can't recall for ARM, it's been more than a year since I used qemu >> on that platform. That said, ... on the platforms we use ROM is in low >> memory. What's your coreboot system.map say? >> > I'm not sure what 'coreboot system.map' is but I will assume that you mean > {bootblock, romstage, ramstage}.map. > > CONFIG_BOOTBLOCK_BASE is 0x10000 > CONFIG_ROMSTAGE_BASE is 0x20000 > CONFIG_SYS_SDRAM_BASE is 0x1000000 > > Uploaded files: https://gist.github.com/pietrushnic/7fea530d3498cf5ac5cfo > > Meanwhile I objdumped bootblock and found that ldmia instruction that > breaks qemu execution came from dcache_foreach method. > > Anyone know how to load bootblock debug symbols to gdb when debugging > using '-s -S' option ? > > Thanks, > Piotr > > -- > coreboot mailing list: [email protected] > http://www.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
