On Thu, Sep 4, 2014 at 2:57 PM, Ricardo Menzer <[email protected]> wrote:
> Hi guys, > I'm trying to port an old Intel version of coreboot for tunnelcreek to > a newer version of the coreboot code. > > I'm stuck at a point in which the boot stops at get_pbus(device_t dev) > because dev is NULL (0x0). > > I think the problem is in a function that calls pci_write_config32, > but using PCI_DEV(0,0,0) to access the bus 0, device 0, function 0. > PCI_DEV(0,0,0) evaluates to 0x0, which get_pbus interprets as a NULL > pointer. This is used in the 'dev' parameter of pci_write_config32. get_pbus() is only used in ramstage which uses struct device * (device_t). Depending on where you are wanting to call this you may already have a device_t. If not you'll need to do the lookup using dev_find_slot(). > > > I looked at the source code and in the mailing list, but couldn't find > a way to pass a correct dev parameter to the function. > I'm also not so sure I am in the right path. I may be confusing thing > a little, since I'm no so experienced in x86 hardware and firmware > levels. I'm also learning coreboot at my own, it's a lot of > information at the same time being pushed at my brain! ;) > > I appreciate any help and clarifications! > > Thank you very much! > > > Ricardo Menzer > [email protected] > +55 (32) 8865-8805 > > -- > coreboot mailing list: [email protected] > http://www.coreboot.org/mailman/listinfo/coreboot >
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