Update BOARD_ROMSIZE_KB_2048 in src\mainboard\intel\bayleybay_fsp\Kconfig to BOARD_ROMSIZE_KB_8192, re-generate .config and make sure .config the ROM size is 8MB, now you can run make to generate 8MB ROM.
On Tue, Jul 7, 2015 at 10:32 AM, Cao Duc Quan <[email protected]> wrote: > Dear all, > I am trying to make coreboot work on BayTrail-I SoC E3845. > I wonder if anyone could build the SPI ROM 8MB image with coreboot? I > found that I got 2MB image with normal building so I have to flash two > times SPI.rom first then flash coreboot.rom. > > Many Thanks, > -- > Quan Cao > 0976574864 > > -- > coreboot mailing list: [email protected] > http://www.coreboot.org/mailman/listinfo/coreboot >
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