Hi > > In "AMD Bolton FCH Register Reference Guide" (51192), page 2-154, this > register "Interrupt Line – RW – 32 bits - [PCI_Reg:3Ch]" is 0x12/0x11 > while having booted the vendor binary and 0xff/0xff when having booted > coreboot.
Well this register is used only by OS when MPTABLE/ACPI PCI routing fails. The register is only a storage, it does not drive any logic.Btw 12/11 is wrong as PCI specs says it can be 0-15 range. So the issues must be something else. Thanks Rudolf -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
