Yes, lets revert it. The popups work again after reverting commit 03e81e1 (https://review.coreboot.org/#/c/13900).
The other one (https://review.coreboot.org/#/c/13901/) doesn't make a difference on my board. Probably because I have VGA. I suppose that one can stay. On Wed, Mar 9, 2016 at 1:57 PM, Martin Roth <[email protected]> wrote: > Do you think we should revert those patches until we can get them fixed? > > On Wed, Mar 9, 2016 at 11:56 AM, Ben Gardner <[email protected]> wrote: >> FYI - >> >> I just tried memtest86 with the popup patches that were added to coreboot. >> I'm seeing issues with clearing the background before drawing the SPD popup. >> >> When I hit "c", the "settings" popup shows on both serial and VGA >> properly. VGA has a black background and serial clears the area. >> >> When I select "display SPD data", it doesn't clear the background >> before drawing the data and doesn't restore what was under when the >> popup is lowered. >> >> Below is the output from the serial port when displaying the SPD data. >> View in a fixed width font. >> >> ----- >> Memtest86+ 5.01 coreboot 001| Intel(R) Atom(TM) CPU E3845 @ 1.91GHz >> CLK: 1917 MHz (X64 Mode) | Pass 0% >> L1 CSPD Data: Slot 095 MB/s | Test 50% ################### >> L2 Cache: 1024K 22030 MB/s | Test #2 [Address test, own address Parallel] >> L3 Cac92:13N0be03 04 19 02 02 03s11n01 0820a 001fe600 1965M of 4013M >> Memory69:78069M3c 69811M18s81 20t08r3c 3ca01r40s83 05 | Time: 0:00:01 >> ------00-00-00-00-00-00-00-00-00-84-00-00-00-00-00-00------------------------- >> Core#:00 00M00 00s00l00)00|00C00 00m00 00R0f:01102M00 (DDR3-833) - BCLK: 83 >> State:00 00 00 00 00 00 00 00 00 00 00 00 00 00s00C00 9-9-9-10 @ 64-bit Mode >> Cores:00100 00 00 00 00 00 00 00 00 00 00 00 00 00 000 Errors: 0 >> ------00-00 00 00 00 00 00 00 00 00 00 00 00 >> 00-00-00------------------------- >> 00 00 00 00 00 80 2c 00 00 00 00 00 00 00 c4 b1 >> Memory34P4b 54 46 32 35 36 36 34 48 5a 2d 31 47 36 45 >> ------31-45 31 80 2c 00 00 00 00 00 00 00 00 00 00 00 >> - Sl00 00 00 00 00 00 00 00 00 00 00 00 00 00600ZffG6E1E >> - Sl57 50 4e 3a 33 34 32 35 36 20 52 45 56 3a641ZffG6E1E >> 32 30 34 38 20 4d 42 59 54 45 ff ff ff ff ff ff >> ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff >> ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff >> ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff >> >> >> >> Wabtec CPU-1900 >> (ESC)exit (c)configuration (SP)scroll_lock (CR)scroll_unlock >> ----- >> >> And what is shown after returning to the settings menu. >> >> ----- >> Memtest86+ 5.01 coreboot 001| Intel(R) Atom(TM) CPU E3845 @ 1.91GHz >> CLK: 1917 MHz (X64 Mode) | Pass 0% >> L1 CSPD Data: Slot 195 MB/s | Test 88% ################################## >> L2 CaNo valid DMI Memory Devices info founding inversions, 1s & 0s Parallel] >> L3 Cac92:13N0be03 04 19 02 02 03s11n01 0890a 006fe400 2048M of 4013M >> Memory69:78069M3c 69811M18s81 20t08r3c 3cf01f40f83 05 | Time: 0:05:38 >> ------00-00-00-00-00-00-00-00-00-84-00-00-00-00-00-00------------------------- >> Core#:00 00M00 00s00l00)00|00C00 00m00 00R0f:01102M00 (DDR3-833) - BCLK: 83 >> State:00 00 00s00C00 9-9-9-10 @ 64-bit Mode >> Cores:00100 Settings: 00 00 000 Errors: 0 >> ------00-00 >> 00-00-00------------------------- >> 00 00 (1) Test Selection 00 c4 b1 >> Memory34P4b (2) Address Range 47 36 45 >> ------31-45 (3) Error Report Mode 00 00 00 >> - Sl00 00 (4) Core Selection 00600ZffG6E1E >> - Sl57 50 (5) Refresh Screen 3a641ZffG6E1E >> 32 30 (6) Display DMI Data ff ff ff >> ff ff (7) Display SPD Data ff ff ff >> ff ff ff ff ff >> ff ff (0) Continue ff ff ff >> >> >> >> Wabtec CPU-1900 >> (ESC)exit (c)configuration (SP)scroll_lock (CR)scroll_unlock >> ----- >> >> Not sure what is going on here. >> I don't have this issue without the popup patches. >> I'll look into it a bit more. >> >> Ben >> >> -- >> coreboot mailing list: [email protected] >> https://www.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot
