To clarify. DDR3L is the correct one to use (I was wrongly using DDR3) From: Naveed Ghori Sent: Tuesday, 31 May 2016 12:45 PM To: 'Mayuri Tendulkar'; coreboot Subject: Re: Debug builds and memory testing
I was using DDR3 instead of the low voltage DDR3L From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 31 May 2016 12:40 PM To: Naveed Ghori; coreboot Subject: Re: Debug builds and memory testing How u resolved memory issue? From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Naveed Ghori Sent: 31 May 2016 06:52 To: coreboot <coreboot@coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: [coreboot] Debug builds and memory testing To update this: There are option in the menuconfig to enable various debugging options and logs. From: Naveed Ghori Sent: Tuesday, 24 May 2016 2:04 PM To: coreboot Subject: Debug builds and memory testing Hi all, Is there a debug build of coreboot or a way to test memory very early on. My custom board goes through the romstage just fine but stops booting while trying to enumerate the buses. I am suspecting RAM might be an issue so would like to eliminate that by doing a memory test on it. -------------- POST: 0x72 Enumerating buses... Show all devs... Before device enumeration. Root Dev -------------- Thanks in advance, Naveed "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."
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