Dear Sir.
My ENV. Platform : intel atom rangeley mohon peak CRB(C2358) This time, I'm try to study for MRC(Memory Reference Code). But, I'm can not found a some example code on coreboot source tree.(rangely) Anyway, I'm get a some hint on last image. Performing operation on 'COREBOOT' region... Name Offset Type Size cbfs master header 0x0 cbfs header 32 fallback/romstage 0x80 stage 24356 config 0x6040 raw 440 revision 0x6240 raw 567 cmos_layout.bin 0x64c0 cmos_layout 1316 fallback/dsdt.aml 0x6a40 raw 8074 payload_config 0x8a40 raw 1574 payload_revision 0x90c0 raw 244 (empty) 0x9200 null 27800 *mrc.cache 0xfec0 mrc_cache 65536* cpu_microcode_blob.bin 0x1ff00 microcode 167936 fallback/ramstage 0x48f80 stage 48170 fallback/payload 0x54c00 payload 61309 (empty) 0x63bc0 null 1163992 fsp.bin 0x17fec0 fsp 389120 (empty) 0x1def00 null 133528 bootblock 0x1ff8c0 bootblock 1528 *Question.* 1. What purpose the "mrc.cache"? 2. Where to location the source code for "mrc.cache" ? 3. How modify the MRC ? for the sdram. Thank you.
-- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot

