Ok, so do we need to ask Intel if we use Intel baytrail processor? How we can create this descriptor.bin?
What we observed is if we use descriptor.bin, and not TXE, still system boots up fine. Need to understand the impact of not having TXE. But if we don't use descriptor, it seems system is booting based on current, but display doesn't come up. -----Original Message----- From: Martin Roth [mailto:gauml...@gmail.com] Sent: 13 July 2016 15:36 To: Mayuri Tendulkar <mayuri.tendul...@aricent.com> Cc: coreboot <coreboot@coreboot.org> Subject: Re: [coreboot] TXE and Descriptor bin management in Coreboot Hi Mayuri, The descriptor.bin file is relatively specific to each board. This sets the soft-straps, gives information about the ROM chip being used on that particular board, and sets the sizes of the areas on the SPI ROM. As for the TXE/ME/SPS/xxx binary, this would be specific to the CPU/SOC family at the very least. Some chips will work with an ME read off of a different board that has the same chip. As I recall, others chips have specific settings encoded in this binary as well as in the descriptor. This might just be for Xeon class chips, or it might be more widespread at this point Martin On Wed, Jul 13, 2016 at 4:05 PM, Mayuri Tendulkar <mayuri.tendul...@aricent.com> wrote: > Hi Team > > > > I would like to know how we can handle TXE and descriptor bin in Coreboot? > > > > Is there any generic file for Intel processors which can be used > rather than any proprietary bin files? > > > > Regards > > Mayuri > > "DISCLAIMER: This message is proprietary to Aricent and is intended > solely for the use of the individual to whom it is addressed. It may > contain privileged or confidential information and should not be > circulated or used for any purpose other than for what it is intended. > If you have received this message in error, please notify the > originator immediately. If you are not the intended recipient, you are > notified that you are strictly prohibited from using, copying, > altering, or disclosing the contents of this message. Aricent accepts > no responsibility for loss or damage arising from the use of the > information transmitted by this email including damage from virus." > > -- > coreboot mailing list: coreboot@coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
