Hi Cheng,
On 22.07.2016 12:14, cheng yichen wrote:
> Hi all
>
> My platform is braswell SOC with W83627dhg superIO. In post stage I can get
> debug message over w83627 uart1(3f8/irq4). but after boot to linux, uart
> port is not woarkable. I test the function by minicom but I can't receive
> and send data. I can get uart information by dmesg command.
> How to initial it in corebooot?
You generally have to configure two things
1st the IO resources through the device tree
(like src/mainboard/kontron/ktqm77/devicetree.cb lines 78..81)
2nd on an Intel chipset route these resources to LPC
(you obviously already done that, as you see debug messages, but
make sure no later stage in coreboot overwrites it)
Hope that helps,
Nico
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