Hello Rizwan, Thank you for the tip. I am looking into the whole x86 asm file pointed by you, and cranking it reading x86 architectural manual (lot of info to digest). ;-)
If I'll have questions, I might come back later to ask for clarity, if you allow me. :-) Thank you again, Zoran On Mon, Aug 8, 2016 at 12:35 PM, Qureshi, Rizwan <[email protected]> wrote: > Hi Zoran, > > For skylake refer > src/soc/intel/skylake/bootblock/cache_as_ram.S > around line 256. We are marking the ROMregion as WP and cacheable and > programming an MTRR appropriately. > > So, it’s not removed buts its being done while setting up Cache As Ram. > > > > Regards, > > Rizwan Qureshi > > > > *From:* Zoran Stojsavljevic [mailto:[email protected] > <[email protected]>] > *Sent:* Monday, August 8, 2016 12:33 PM > *To:* coreboot <[email protected]>; Paul Menzel <paulepanter@users. > sourceforge.net> > *Cc:* Qureshi, Rizwan <[email protected]>; Ch, Naveenkrishna < > [email protected]>; Yang, York <[email protected]> > *Subject:* Mistery of the function: static void enable_rom_caching(void) > > > > Hello community, > > > > I was/got again today in Coreboot directory > src/soc/intel/braswell/bootblock/bootblock.c > looking at static void enable_rom_caching(void). > > > > Then, since Paul Menzel have announcement ([ANNOUNCEMENT] Support for > Intel Kaby Lake), I went to look into > src/soc/intel/skylake/bootblock/bootblock.c, > but I did not find this function. Kaby Lake patches do not support this > function as well. > > > > Then I did the following on my WIN 10 (using VMware workstation 12) VM > Fedora 24: > > > > [zoran@localhost intel]$ pwd > > /home/zoran/projects/coreboot/coreboot/src/soc/intel > > [zoran@localhost intel]$ git describe > > 4.4-1038-gdd65ef8 > > [zoran@localhost intel]$ ls -al > > total 48 > > drwxrwxr-x. 12 4096 Aug 1 10:02 . > > drwxrwxr-x. 14 4096 Aug 1 10:02 .. > > drwxrwxr-x. 5 4096 Aug 1 10:02 apollolake > > drwxrwxr-x. 6 4096 Aug 1 10:02 baytrail > > drwxrwxr-x. 6 4096 Aug 1 10:02 braswell > > drwxrwxr-x. 6 4096 Aug 1 10:02 broadwell > > drwxrwxr-x. 3 4096 Aug 1 10:02 common > > drwxrwxr-x. 7 4096 Aug 1 10:02 fsp_baytrail > > drwxrwxr-x. 7 4096 Aug 1 10:02 fsp_broadwell_de > > drwxrwxr-x. 5 4096 Aug 1 10:02 quark > > drwxrwxr-x. 3 4096 Aug 1 10:02 sch > > drwxrwxr-x. 7 4096 Aug 1 10:02 skylake > > [zoran@localhost intel]$ grep -r enable_rom * > > baytrail/bootblock/bootblock.c:static void enable_rom_caching(void) > > baytrail/bootblock/bootblock.c: enable_rom_caching(); > > braswell/bootblock/bootblock.c:static void enable_rom_caching(void) > > braswell/bootblock/bootblock.c: enable_rom_caching(); > > broadwell/bootblock/cpu.c:static void enable_rom_caching(void) > > broadwell/bootblock/cpu.c: enable_rom_caching(); > > fsp_baytrail/bootblock/bootblock.c:static void enable_rom_caching(void) > > fsp_baytrail/bootblock/bootblock.c: enable_rom_caching(); > > [zoran@localhost intel]$ > > > > We see here that from skylake (also does not exists in apollolake) this > function is dropped. > > > > Any logical explanation for this mismatch? > > > > Thank you, > > Zoran > > >
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