Hi Ron I didn't know that and really appreciate all this information. I'll take a look at what you mentioned
Thanks a lot! Em ter, 9 de ago de 2016 às 13:45, ron minnich <rminn...@gmail.com> escreveu: > I have not read this thread closely and maybe I'm telling you something > you know. But I want to warn you about CD. I know it is named 'cache > disabled' > but that's not quite what it means. > > I'm trying and failing to find the original slide deck from the UNM grad > student (and intel employee) who first implemented our cache as ram in > 2005. His point to me was that CD doesn't *really* mean cache hardware is > disabled, just that it changes cache hardware behavior such that refills > from memory are disabled. If there are valid tags in the cache then loads > that hit those tags will work. So the task for CAR on x86 is to create > valid tags, then set CD. His point was the breakthrough for me on > understanding CAR on x86. Ollie Lo and I had been stuck on this point for a > while, we kept thinking we could not set CD and have CAR work; in fact, > setting CD is part of ensuring CAR works. The Intel employee's point was > "you have to read between the lines in section III". > > you can > git grep DO.NOT.INVALIDATE > for a few comments on this and it may help. > > Basically, in the classic car we got in 2005, the steps on x86 are: > enable cache > do references to set tags > disable cache (really!) > then cache as ram works. > > Things have changed on some CPUs since then and we now even have > chipset-dependent x86 CAR code but I suspect the basic idea remains the > same on x86. > > You may already know this, just wanted to make sure. > > ron > -- > coreboot mailing list: coreboot@coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot
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