Hello 김유석, Here is the alghoritm how you'll calculate the address: SLOTCAP address (B0:D1-4:F0:Offset 0x54[31:19]).
There are 16 bits for PCIe space: [1] 8 most significant bits for buses (256 maximum); [2] 5 bits for device ids (32 maximum) per bus; [3] 3 bits for functions (8 maximum) per device! Gives maximum number od 2^16 (65536) different functions, each function has 2^12 (4096 Bytes) configuration space. In total, 256MB space near TOM for PCIe configuration space. Now, you can calculate your physical address as such: BASE address + bus0 + devices 1 to 4 + Function 0 => Physical BASE PCIe address holding config space (4 most significant bits) + 0x00080054. I strongly advise you to execute the following command: lspci --help and review the options (this is very helpful command). Interesting options for you are: -xxx Show hex-dump of the whole config space (dangerous; root only) -xxxx Show hex-dump of the 4096-byte extended config space (root only) You can also do: lspci -xxx and see what are the BAR addresses for 00:01.0, 00:02.0, 00:03.0 and 00:04.0 (where the data memory is physically mapped for the device, per function). You can also use the following options: -xxx Show hex-dump of the whole config space (dangerous; root only) -xxxx Show hex-dump of the 4096-byte extended config space (root only) Interesting pointer to read (for clarification): https://forums.xilinx.com/t5/PCI-Express/PCI-express-Base-Address-Register/td-p/685289 Good Luck, Zoran _______ On 1/13/17, Alexander Böcken <[email protected]> wrote: > Hello, > > this is a PCI related notation. It means Bus 0, Device 1-4, Function 0 of > your board’s PCI bus. Then register offset 0x54, bits 31 to 19. > > Regards, > Alex > > Von: coreboot [mailto:[email protected]] Im Auftrag von ??? > Gesendet: Freitag, 13. Januar 2017 07:35 > An: coreboot > Betreff: [coreboot] How to understand register address on x86? > > > Dear Sir. > > > > This time, I try to read the "V2_Avoton_BWG_Rev1_6_review.pdf" Page 169. Is > see below. > > [cid:[email protected]] > > But I don't understand the SLOTCAP address (B0:D1-4:F0:Offset 0x54[31:19]). > > > > Could you explain this mean to me? > > > > Thank you. > > > -- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot
