Hi Thanks for the lead. Indeed, this was the cause. I've reversed the polarity and it works like a charm. It's really funny, that I haven't caught that on the schematics - probably turning blind ;). Thanks again!
-- Best regards, Kamil Wcisło Embedded Systems Engineer http://3mdeb.com | @3mdeb_com On 02/17/2017 04:51 PM, Kyösti Mälkki wrote: > Hi > > I just had a quick look at the APU3a schema, looks like D+ D- lines on the > J13 connector have switched places. > > Regards, > Kyösti > > > On Fri, Feb 17, 2017 at 5:31 PM, Kamil <[email protected] > <mailto:[email protected]>> wrote: > > Hi everybody, > > We're trying to enable the USB on the J13 connector on APU3 board. It's > using > the EHCI1 device (ports 0 to 3). As far as I understand it, USB > controllers are > configured and set by the AGESA PI binary. I've tried with both versions > of > AGESA - the one specific for pcengines boards > (`3rdparty/blobs/mainboard/pcengines/apu2/AGESA.bin`) > and the latest one for this kind of chip > (`3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin`). > Both versions deliver the same results. I've managed to use the latter > version > by enabling all devices in `mainboard/pcengines/apu2/devicetree.cb`. > I'm using the master branch of coreboot, but also I've tried with some > older > versions (same issue). > > We're working on mainlining all the changes needed for APU3 and one of > them is > this USB header. It's unconnected and not used on APU2 boards, so > disabled by > default. Besides that, shouldn't have more changes in this area. APU3 is > similar > to APU2 board (the same SOC and design in general). The USB connections > are on > page 6 on the schematics. > > My question is, what can we look for to investigate this issue further? > Right > now we're out of options and we don't know what to do next. We would be > grateful > for any insights on this matter. > > * Schematics for APU2 board: https://pcengines.ch/schema/apu2c.pdf > <https://pcengines.ch/schema/apu2c.pdf> > * Schematics for APU3 board: https://pcengines.ch/schema/apu3a.pdf > <https://pcengines.ch/schema/apu3a.pdf> > * Diff of my changes: http://pastebin.com/8YKkzB7Z > * Boot log: http://pastebin.com/uBAubrz9 > * PCI config space dumps: http://pastebin.com/3aBrt6wp > * lsusb dump: http://pastebin.com/V7NTWAnq > > -- > Best regards, > Kamil Wcisło > Embedded Systems Engineer > http://3mdeb.com | @3mdeb_com > > -- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot
