Berj K Chilingirian wrote: > I was hoping to get some advice/guidance on how to disable the > automatic refresh of the DRAM during the ROM stage of coreboot.
Reset the memory controller, or the entire platform. Or, if you find no software solution, maybe you can use a fast FET or logic gate on chip select or another key signal, and use your choice of microcontroller to block refreshes. I don't know if DRAM needs to reply to refreshes, in that case the idea will probably /not/ work, the memory controller will probably get upset without replies. If you do try it, remember to gate the gate such that it never switches in the middle of transactions/commands. Regardless of how you succeed, I'm interested in your findings. //Peter -- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot
