Hi, please always keep the mailing list in CC.
On 27.03.2017 16:48, serdar tunc wrote: > Should i change cbfs size? I tried doing that but my problem still occurs If my suspicion below is correct, your problem is not related to core- boot. It's about firmware parts that share the flash chip with coreboot. The first part is a descriptor that holds a table of regions, your CBFS should match the BIOS region in size. I advice you to never flash more than one (untested) region at once. It makes troubleshooting harder, since you won't know otherwise which re- gion causes problems. Nico > > > 27 Mar 2017 17:33 tarihinde "Nico Huber" <[email protected]> yazdı: > >> Hello Serdar, Zoran, >> >> On 27.03.2017 16:14, Zoran Stojsavljevic wrote: >>> [user@localhost projects]$ cat dmesg.txt | grep 00:19.0 >>> [ 0.151652] pci 0000:00:19.0: *[8086:294c*] type 00 class 0x020000 >>> [ 0.151694] pci 0000:00:19.0: reg 0x10: [mem 0xe1600000-0xe161ffff] >>> [ 0.151707] pci 0000:00:19.0: reg 0x14: [mem 0xe1624000-0xe1624fff] >>> [ 0.151721] pci 0000:00:19.0: reg 0x18: [io 0x3000-0x301f] >>> [ 0.151802] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold >>> [ 1.489719] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) >>> set to dynamic conservative mode >>> [ 1.611526] e1000e 0000:00:19.0: The NVM Checksum Is Not Valid >> >> I can't say for sure, but this looks much like the GbE and/or Firmware >> Descriptor regions of the BIOS flash are corrupted. If in doubt, you can >> generate a layout file for flashrom from the backup of the vendor BIOS >> with `ifdtool -f` (see util/ifdtool/ in the coreboot tree). And flash >> back these selected regions with `flashrom -l layoutfile -i fd -i gbe >> ...` from the backup. >> >>> *[ 1.635873] e1000e: probe of 0000:00:19.0 failed with error -5* >>> [user@localhost projects]$ >> >> Hope that helps, >> Nico >> >> > -- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot
