Igor, if you are going to say things like "AFAIK there is no public description of these tables' layout and contents, only Intel knows how to build and parse them.", it's really a good idea to back it up with a primary source, especially since you also use phrases like "I assume" and "I guess". I am pretty sure you're wrong in this case. The V in VBT, as I understand it, means VESA, and VESA has been a standard for about 30 years.
Please, everyone, if you're going to move this conversation forward, you need to cite primary sources at least, such as this one: http://www.petesqbsite.com/sections/tutorials/tuts/vbe3.pdf. thanks ron On Tue, Apr 4, 2017 at 10:19 AM Igor Skochinsky via coreboot < [email protected]> wrote: > Hello Zoran, > > > Monday, April 3, 2017, 8:58:43 PM, you wrote: > > > > VBT should fulfill this VBE standard, as my best understanding is, or not?! > > VBE only describes the int 10h BIOS interface extensions, VBT are tables > used by Intel to provide info about how to control the GPU (I assume). > AFAIK there is no public description of these tables' layout and contents, > only Intel knows how to build and parse them. > Both VBE(code) and VBT (data) may be present in the video card's option > ROM, I guess that's the only common part. > > > > > Zoran > > On Mon, Apr 3, 2017 at 7:36 PM, Igor Skochinsky via coreboot < > [email protected]> wrote: > Hello Zoran, > > Monday, April 3, 2017, 9:24:41 AM, you wrote: > > > > *VBT is not code, it's a table* -- that's what the T is -- and you can > create it any way you want. > > Not going to say more, anyway. Just to point to the standard: > https://en.wikipedia.org/wiki/ > <https://en.wikipedia.org/wiki/VESA_BIOS_Extensions>VESA_BIOS_Extensions > <https://en.wikipedia.org/wiki/VESA_BIOS_Extensions> > > > Not sure why you posted this link. VBE is not VBT, it's a completely > separate and different thing. > > > > > > To clever enough! ;-) > > Zoran > > On Mon, Apr 3, 2017 at 2:38 AM, ron minnich <[email protected]> wrote: > As for graphics startup, here's what I learned when I was doing this in > 2012/2013: the kernel could start sandy and ivy with no vbios needed. > However, I have been told that the veil of secrecy has started to draw a > bit closer in subsequent chipsets, and that something like a VGA BIOS/GOP > has to run or graphics will not work. I really don't know, I have not > looked at this in over 3 years. > > Todd, just to make sure we're on the same page, VBT is not code, it's a > table -- that's what the T is -- and you can create it any way you want. > > Also, as for numbers: the fastest graphics startup, by far, was when we > had coreboot- based startup with configuration specialized to the chromeos > laptop. How fast? At one point we had a pixel booting to chromeos prompt in > 2.7 seconds, reduced from 7.7 seconds when linux did the graphics init. > We've seen that the linux graphics init is highly concurrent and > generalized, and that tends to mean slow. Of course this was all far faster > than the 8086-mode vga BIOS supplied by "the vendor". But we were a bit > surprised to see how much faster coreboot was than the linux kernel. > > I doubt this speed difference matters any more, since boot time only needs > to be "fast enough" nowadays and 10 seconds seems to do it for most people > -- plus, any 5-second advantage in boot time vanishes as soon as you go to > your first web page. > > ron > > > > On Sun, Apr 2, 2017 at 5:31 PM ron minnich <[email protected]> wrote: > So, I'll mention go userland one last time, for a simple reason: I have it > on good authority that at some places, saying you have a go userland > instead of a c userland checks a check box on a security checklist. I think > that's a sensible decision, having watched all the awful ways that C > programs tend to go wrong :-) > > ron > > -- > coreboot mailing list: [email protected] > https://www.coreboot.org/mailm > <https://www.coreboot.org/mailman/listinfo/coreboot>an/listinfo/coreboot > <https://www.coreboot.org/mailman/listinfo/coreboot> > > > > > > > > > *-- WBR, Igor *-- > coreboot mailing list: [email protected] > https://www.coreboot.org/ > <https://www.coreboot.org/mailman/listinfo/coreboot> > mailman/listinfo/coreboot > <https://www.coreboot.org/mailman/listinfo/coreboot> > > > > > > *-- WBR, Igor* > -- > coreboot mailing list: [email protected] > https://www.coreboot.org/mailman/listinfo/coreboot
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