Hello coreboot developers and Denverton Maintainers, As the Denverton support has been integrated, I tried to port our changes over it and see what can be contributed... The first thing I noticed was that there is a hard dependency from the chip to the harcuvar board which looked really wrong and prevented me to add our board. (see bellow for the details)
So I propose some changes to fix this in [1] and [2]. [1] https://review.coreboot.org/22309/ [2] https://review.coreboot.org/22310/ I also did a quick port of the Cormorant Lake CRB in [3] and [4]; but as Paul Menzel commented it should probably be a variant instead of a full board. [3] https://review.coreboot.org/22309/ [4] https://review.coreboot.org/22311/ However it serve to demonstrate the issue as Jenkins caught it at [5]: The file "harcuvar_boardid.h" is located in "src/mainboard/intel/harcuvar" but is included from "src/soc/intel/denverton_ns" in "romstage.c" and "chip.c". [5] https://qa.coreboot.org/job/coreboot-gerrit/62870/testReport/(root)/board/INTEL_CORMORANT/ For the record, the log ends with: | src/soc/intel/denverton_ns/romstage.c:19:30: fatal error: harcuvar_boardid.h: No such file or directory | #include <harcuvar_boardid.h> To conclude, I think the current Cormorant Lake CRB patches can be dropped however I'd like to keep them around until a solution is found (either by merging the patches in [1] and [2]; or any other solutions) Best Regards, Julien VdG P.S.: I'm still learning to use gerrit -- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot
