Hi! I got a little problem with SATA controller in H110 Skylake PCH (desktop). SATA device geographical address - 0:17h:0 on PCI, and it enabled via devicetree.cb. This params correctly send in FspSiliconInit. After this coreboot run PCI bus scan. And my SATA device return 0xffffffff on PCI read config cycles. I search in Intel datasheet for specific SATA disable pin or something else, but there is no methods that can make SATA inactive. Maybe somebody advice about it?
-- regards, Perepelitsin Roman
coreboot-4.7-51-g2ca4ca3f21-dirty Thu Jan 18 22:05:03 UTC 2018 bootblock starting... CPU: Intel(R) Core(TM) i5-6600 CPU @ 3.30GHz CPU: ID 506e3, Skylake H R0, ucode: 000000c1 CPU: AES supported, TXT supported, VT supported MCH: device id 191f (rev 07) is Skylake Desktop PCH: device id a143 (rev 31) is Skylake-H H110 IGD: device id 1912 (rev 06) is Skylake GT3 misccfg_mask:fff000ff misccfg_value:43100 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/romstage' CBFS: Found @ offset 80 size b694 coreboot-4.7-51-g2ca4ca3f21-dirty Thu Jan 18 22:05:03 UTC 2018 romstage starting... pm1_sts: ffff pm1_en: ffff pm1_cnt: ffffffff gpe0_sts[0]: ffffffff gpe0_en[0]: ffffffff gpe0_sts[1]: ffffffff gpe0_en[1]: ffffffff gpe0_sts[2]: ffffffff gpe0_en[2]: ffffffff gpe0_sts[3]: ffffffff gpe0_en[3]: ffffffff TCO_STS: 0000 0000 GEN_PMCON: e0040200 0000503a GBLRST_CAUSE: ffffffff ffffffff prev_sleep_state 5 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fsp-m.bin' CBFS: Found @ offset 38ec0 size 5f000 POST: 0x34 signure FSP - 0x4d5f4450554c424b signure FSP hrd - 0x4d5f4450554c424b MRC: no data in 'RW_MRC_CACHE' bootmode is set to :0 SPD @ 0x50 SPD: module type is DDR4 SPD: module part is KHX2400C15D4/8G SPD: banks 8, ranks 1, rows 15, columns 10, density 4096 Mb SPD: device width 8 bits, bus width 64 bits SPD: module size is 4096 MB (per channel) Architectural UPD values for MemoryInit at: 0xfef03878 0x01: Revision 0x00000000: NvsBufferPtr 0xfef17f00 --> 0xfef18000: StackBase 0x00028000: StackSize 0x00000000 --> 0x00002000: BootLoaderTolumSize 0x00000000: BootMode UPD values for MemoryInit: fef03858: 4b 42 4c 55 50 44 5f 4d 00 00 00 00 00 00 00 00 KBLUPD_M........ fef03868: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03878: 01 00 00 00 00 00 00 00 00 80 f1 fe 00 80 02 00 ................ fef03888: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 . .............. fef03898: 00 00 44 00 00 00 00 00 60 4e f0 fe 00 00 00 00 ..D.....`N...... fef038a8: 00 00 00 00 00 00 00 00 00 02 0f f0 00 f0 0f f0 ................ fef038b8: 0f 00 ff 00 ff 00 33 cc 00 cc 33 cc 33 00 ff 00 ......3...3.3... fef038c8: ff 00 00 01 03 02 04 05 06 07 01 00 04 05 02 03 ................ fef038d8: 06 07 79 00 51 00 64 00 64 00 28 00 14 00 14 00 ..y.Q.d.d.(..... fef038e8: 1a 00 01 00 00 01 00 00 00 00 40 00 00 00 80 00 ..........@..... fef038f8: 00 08 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................ fef03908: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03938: 00 00 00 02 01 01 03 00 00 00 05 00 00 00 00 00 ................ fef03948: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef039c8: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 ................ fef039d8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 02 ................ fef039e8: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef039f8: 00 a0 d1 fe 00 b0 d1 fe 00 c0 d1 fe 01 00 00 00 ................ fef03a08: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03a78: 2c 01 64 00 00 00 01 02 02 02 00 00 00 00 00 00 ,.d............. fef03a88: 01 01 01 00 00 08 08 08 08 07 07 07 07 02 02 02 ................ fef03a98: 02 0c 0c 01 0c 0c 0c 0c 0c 0c 0c 0c 00 00 00 00 ................ fef03aa8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03ab8: 00 00 00 00 00 00 00 df 03 00 03 00 00 00 00 00 ................ fef03ac8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03b28: 00 00 00 01 01 00 01 00 00 00 00 00 00 00 00 00 ................ fef03b38: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03b48: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03b58: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 d0 fe ................ fef03b68: f0 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03b78: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03d48: 00 00 00 01 00 18 00 00 a0 ef 00 00 00 00 00 00 ................ fef03d58: 00 00 00 00 00 00 00 00 ff 0f 00 00 12 02 00 ff ................ fef03d68: 00 00 07 03 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03d78: 54 45 53 54 00 00 01 01 00 01 00 02 00 02 02 02 TEST............ fef03d88: 02 02 02 01 00 02 02 01 00 00 00 00 00 00 00 00 ................ fef03d98: 00 00 00 01 08 08 08 08 08 08 08 08 08 08 08 08 ................ fef03da8: 08 08 08 08 07 07 07 07 07 07 07 07 07 07 07 07 ................ fef03db8: 07 07 07 07 06 06 06 06 06 06 06 06 06 06 06 06 ................ fef03dc8: 06 06 06 06 e8 03 01 00 10 27 02 00 00 00 00 00 .........'...... fef03dd8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03df8: 00 00 00 00 00 01 00 00 01 01 00 01 00 01 00 00 ................ fef03e08: 01 00 01 01 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03e18: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03e98: 00 00 00 00 00 00 aa 55 .......U Calling FspMemoryInit: 0xffa991c8 0xfef03858: raminit_upd 0xfef04d14: &hob_list_ptr POST: 0x92 POST: 0x98 FspMemoryInit returned 0x40000002 FSP: handling reset type 40000002 soft_reset() called! coreboot-4.7-51-g2ca4ca3f21-dirty Thu Jan 18 22:05:03 UTC 2018 bootblock starting... CPU: Intel(R) Core(TM) i5-6600 CPU @ 3.30GHz CPU: ID 506e3, Skylake H R0, ucode: 000000c1 CPU: AES supported, TXT supported, VT supported MCH: device id 191f (rev 07) is Skylake Desktop PCH: device id a143 (rev 31) is Skylake-H H110 IGD: device id 1912 (rev 06) is Skylake GT3 misccfg_mask:fff000ff misccfg_value:43100 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/romstage' CBFS: Found @ offset 80 size b694 coreboot-4.7-51-g2ca4ca3f21-dirty Thu Jan 18 22:05:03 UTC 2018 romstage starting... pm1_sts: ffff pm1_en: ffff pm1_cnt: ffffffff gpe0_sts[0]: ffffffff gpe0_en[0]: ffffffff gpe0_sts[1]: ffffffff gpe0_en[1]: ffffffff gpe0_sts[2]: ffffffff gpe0_en[2]: ffffffff gpe0_sts[3]: ffffffff gpe0_en[3]: ffffffff TCO_STS: 0000 0000 GEN_PMCON: e0240200 0000523a GBLRST_CAUSE: ffffffff ffffffff prev_sleep_state 5 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fsp-m.bin' CBFS: Found @ offset 38ec0 size 5f000 POST: 0x34 signure FSP - 0x4d5f4450554c424b signure FSP hrd - 0x4d5f4450554c424b MRC: no data in 'RW_MRC_CACHE' bootmode is set to :0 SPD @ 0x50 SPD: module type is DDR4 SPD: module part is KHX2400C15D4/8G SPD: banks 8, ranks 1, rows 15, columns 10, density 4096 Mb SPD: device width 8 bits, bus width 64 bits SPD: module size is 4096 MB (per channel) Architectural UPD values for MemoryInit at: 0xfef03878 0x01: Revision 0x00000000: NvsBufferPtr 0xfef17f00 --> 0xfef18000: StackBase 0x00028000: StackSize 0x00000000 --> 0x00002000: BootLoaderTolumSize 0x00000000: BootMode UPD values for MemoryInit: fef03858: 4b 42 4c 55 50 44 5f 4d 00 00 00 00 00 00 00 00 KBLUPD_M........ fef03868: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03878: 01 00 00 00 00 00 00 00 00 80 f1 fe 00 80 02 00 ................ fef03888: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 . .............. fef03898: 00 00 44 00 00 00 00 00 60 4e f0 fe 00 00 00 00 ..D.....`N...... fef038a8: 00 00 00 00 00 00 00 00 00 02 0f f0 00 f0 0f f0 ................ fef038b8: 0f 00 ff 00 ff 00 33 cc 00 cc 33 cc 33 00 ff 00 ......3...3.3... fef038c8: ff 00 00 01 03 02 04 05 06 07 01 00 04 05 02 03 ................ fef038d8: 06 07 79 00 51 00 64 00 64 00 28 00 14 00 14 00 ..y.Q.d.d.(..... fef038e8: 1a 00 01 00 00 01 00 00 00 00 40 00 00 00 80 00 ..........@..... fef038f8: 00 08 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................ fef03908: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03938: 00 00 00 02 01 01 03 00 00 00 05 00 00 00 00 00 ................ fef03948: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef039c8: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 ................ fef039d8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 02 ................ fef039e8: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef039f8: 00 a0 d1 fe 00 b0 d1 fe 00 c0 d1 fe 01 00 00 00 ................ fef03a08: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03a78: 2c 01 64 00 00 00 01 02 02 02 00 00 00 00 00 00 ,.d............. fef03a88: 01 01 01 00 00 08 08 08 08 07 07 07 07 02 02 02 ................ fef03a98: 02 0c 0c 01 0c 0c 0c 0c 0c 0c 0c 0c 00 00 00 00 ................ fef03aa8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03ab8: 00 00 00 00 00 00 00 df 03 00 03 00 00 00 00 00 ................ fef03ac8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03b28: 00 00 00 01 01 00 01 00 00 00 00 00 00 00 00 00 ................ fef03b38: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03b48: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03b58: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 d0 fe ................ fef03b68: f0 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03b78: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03d48: 00 00 00 01 00 18 00 00 a0 ef 00 00 00 00 00 00 ................ fef03d58: 00 00 00 00 00 00 00 00 ff 0f 00 00 12 02 00 ff ................ fef03d68: 00 00 07 03 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03d78: 54 45 53 54 00 00 01 01 00 01 00 02 00 02 02 02 TEST............ fef03d88: 02 02 02 01 00 02 02 01 00 00 00 00 00 00 00 00 ................ fef03d98: 00 00 00 01 08 08 08 08 08 08 08 08 08 08 08 08 ................ fef03da8: 08 08 08 08 07 07 07 07 07 07 07 07 07 07 07 07 ................ fef03db8: 07 07 07 07 06 06 06 06 06 06 06 06 06 06 06 06 ................ fef03dc8: 06 06 06 06 e8 03 01 00 10 27 02 00 00 00 00 00 .........'...... fef03dd8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03df8: 00 00 00 00 00 01 00 00 01 01 00 01 00 01 00 00 ................ fef03e08: 01 00 01 01 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef03e18: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef03e98: 00 00 00 00 00 00 aa 55 .......U Calling FspMemoryInit: 0xffa991c8 0xfef03858: raminit_upd 0xfef04d14: &hob_list_ptr POST: 0x92 POST: 0x98 FspMemoryInit returned 0x00000000 CBMEM: IMD: root @ 7afff000 254 entries. IMD: root @ 7affec00 62 entries. External stage cache: IMD: root @ 7b3ff000 254 entries. IMD: root @ 7b3fec00 62 entries. 0 DIMMs found top_of_ram = 0x7b000000 MTRR Range: Start=7a000000 End=7b000000 (Size 1000000) MTRR Range: Start=7b000000 End=7b800000 (Size 800000) MTRR Range: Start=ff800000 End=0 (Size 800000) CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/postcar' CBFS: Found @ offset c6f00 size 7bf0 Decompressing stage fallback/postcar @ 0x7abcdfc0 (47448 bytes) Loading module at 7abce000 with entry 7abce000. filesize: 0x7550 memsize: 0xb918 Processing 401 relocs. Offset value of 0x78bce000 coreboot-4.7-51-g2ca4ca3f21-dirty Thu Jan 18 22:05:03 UTC 2018 postcar starting... CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset b780 size 170bd Decompressing stage fallback/ramstage @ 0x7ab0ffc0 (773328 bytes) Loading module at 7ab10000 with entry 7ab10000. filesize: 0x2eb80 memsize: 0xbcc90 Processing 3064 relocs. Offset value of 0x7aa10000 coreboot-4.7-51-g2ca4ca3f21-dirty Thu Jan 18 22:05:03 UTC 2018 ramstage starting... POST: 0x39 POST: 0x80 Normal boot. POST: 0x70 BS: BS_PRE_DEVICE times (us): entry 0 run 1033 exit 0 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 3b1440 size 18400 microcode: sig=0x506e3 pf=0x2 revision=0xc1 Skip microcode update CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fsp-s.bin' CBFS: Found @ offset 98ec0 size 2e000 Detected 4 core, 4 thread CPU. Setting up SMI for CPU IED base = 0x7b400000 IED size = 0x00400000 Will perform SMM setup. CPU: Intel(R) Core(TM) i5-6600 CPU @ 3.30GHz. Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...done. AP: slot 1 apic_id 4. Waiting for 2nd SIPI to complete...done. AP: slot 2 apic_id 6. AP: slot 3 apic_id 2. Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 Processing 12 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7ab29fc1(00000000) Installing SMM handler to 0x7b000000 Loading module at 7b010000 with entry 7b010092. filesize: 0xd48 memsize: 0x4d60 Processing 97 relocs. Offset value of 0x7b010000 Loading module at 7b008000 with entry 7b008000. filesize: 0x1a8 memsize: 0x1a8 Processing 12 relocs. Offset value of 0x7b008000 SMM Module: placing jmp sequence at 7b007c00 rel16 0x03fd SMM Module: placing jmp sequence at 7b007800 rel16 0x07fd SMM Module: placing jmp sequence at 7b007400 rel16 0x0bfd SMM Module: stub loaded at 7b008000. Will call 7b010092(00000000) Clearing SMI status registers SMI_STS: PM1 PM1_STS: PWRBTN TMROF TCO_STS: BOOT SECOND_TO New SMBASE 0x7b000000 In relocation handler: CPU 0 New SMBASE=0x7b000000 IEDBASE=0x7b400000 Writing SMRR. base = 0x7b000006, mask=0xff800800 Relocation complete. New SMBASE 0x7afffc00 In relocation handler: CPU 1 New SMBASE=0x7afffc00 IEDBASE=0x7b400000 Writing SMRR. base = 0x7b000006, mask=0xff800800 Relocation complete. New SMBASE 0x7afff800 In relocation handler: CPU 2 New SMBASE=0x7afff800 IEDBASE=0x7b400000 Writing SMRR. base = 0x7b000006, mask=0xff800800 Relocation complete. New SMBASE 0x7afff400 In relocation handler: CPU 3 New SMBASE=0x7afff400 IEDBASE=0x7b400000 Writing SMRR. base = 0x7b000006, mask=0xff800800 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 506e3 CPU: family 06, model 5e, stepping 03 Setting up local APIC... apic_id: 0x00 done. Turbo is available but hidden Turbo has been enabled SGX : param.enable = 0 Skip microcode update CPU #0 initialized Initializing CPU #3 Initializing CPU #2 Initializing CPU #1 CPU: vendor Intel device 506e3 CPU: family 06, model 5e, stepping 03 CPU: vendor Intel device 506e3 CPU: family 06, model 5e, stepping 03 Setting up local APIC...Setting up local APIC...CPU: vendor Intel device 506e3 CPU: family 06, model 5e, stepping 03 apic_id: 0x04 done. Setting up local APIC...Skip microcode update CPU #1 initialized apic_id: 0x02 done. apic_id: 0x06 done. Skip microcode update CPU #3 initialized Skip microcode update CPU #2 initialized CPU: frequency set to 3900 MHz Enabling SMIs. Locking SMM. SGX: pre-conditions not met SGX: pre-conditions not met SGX: pre-conditions not met SGX: pre-conditions not met POST: 0x71 gpio_padcfg [0xaf, 00] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 00] DW1 [0x00000018 : 0x00000000 : 0x00000018] gpio_padcfg [0xaf, 01] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 01] DW1 [0x00003c19 : 0x00003000 : 0x00003019] gpio_padcfg [0xaf, 02] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 02] DW1 [0x00003c1a : 0x00003000 : 0x0000301a] gpio_padcfg [0xaf, 03] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 03] DW1 [0x00003c1b : 0x00003000 : 0x0000301b] gpio_padcfg [0xaf, 04] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 04] DW1 [0x00003c1c : 0x00003000 : 0x0000301c] gpio_padcfg [0xaf, 05] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 05] DW1 [0x0000001d : 0x00000000 : 0x0000001d] gpio_padcfg [0xaf, 06] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 06] DW1 [0x0000001e : 0x00000000 : 0x0000001e] gpio_padcfg [0xaf, 07] DW0 [0x44000702 : 0x40000100 : 0x40000102] gpio_padcfg [0xaf, 07] DW1 [0x0000001f : 0x00000000 : 0x0000001f] gpio_padcfg [0xaf, 08] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 08] DW1 [0x00000020 : 0x00000000 : 0x00000020] gpio_padcfg [0xaf, 09] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 09] DW1 [0x00001021 : 0x00003000 : 0x00003021] gpio_padcfg [0xaf, 10] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 10] DW1 [0x00001022 : 0x00003000 : 0x00003022] gpio_padcfg [0xaf, 11] DW0 [0x44000702 : 0x40000100 : 0x40000102] gpio_padcfg [0xaf, 11] DW1 [0x00003023 : 0x00000000 : 0x00000023] gpio_padcfg [0xaf, 12] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 12] DW1 [0x00000024 : 0x00000000 : 0x00000024] gpio_padcfg [0xaf, 13] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 13] DW1 [0x00000025 : 0x00000000 : 0x00000025] gpio_padcfg [0xaf, 14] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 14] DW1 [0x00000026 : 0x00000000 : 0x00000026] gpio_padcfg [0xaf, 15] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xaf, 15] DW1 [0x00003027 : 0x00003000 : 0x00003027] gpio_padcfg [0xaf, 16] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 16] DW1 [0x00000028 : 0x00000000 : 0x00000028] gpio_padcfg [0xaf, 17] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 17] DW1 [0x00000029 : 0x00000000 : 0x00000029] gpio_padcfg [0xaf, 18] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 18] DW1 [0x0000002a : 0x00000000 : 0x0000002a] gpio_padcfg [0xaf, 19] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 19] DW1 [0x0000002b : 0x00000000 : 0x0000002b] gpio_padcfg [0xaf, 20] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 20] DW1 [0x0000002c : 0x00000000 : 0x0000002c] gpio_padcfg [0xaf, 21] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 21] DW1 [0x0000002d : 0x00000000 : 0x0000002d] gpio_padcfg [0xaf, 22] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 22] DW1 [0x0000002e : 0x00000000 : 0x0000002e] gpio_padcfg [0xaf, 23] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 23] DW1 [0x0000002f : 0x00000000 : 0x0000002f] gpio_padcfg [0xaf, 24] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 24] DW1 [0x00000030 : 0x00000000 : 0x00000030] gpio_padcfg [0xaf, 25] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 25] DW1 [0x00000031 : 0x00000000 : 0x00000031] gpio_padcfg [0xaf, 26] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 26] DW1 [0x00000032 : 0x00000000 : 0x00000032] gpio_padcfg [0xaf, 27] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 27] DW1 [0x00000033 : 0x00000000 : 0x00000033] gpio_padcfg [0xaf, 28] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 28] DW1 [0x00000034 : 0x00000000 : 0x00000034] gpio_padcfg [0xaf, 29] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 29] DW1 [0x00000035 : 0x00000000 : 0x00000035] gpio_padcfg [0xaf, 30] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 30] DW1 [0x00000036 : 0x00000000 : 0x00000036] gpio_padcfg [0xaf, 31] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 31] DW1 [0x00000037 : 0x00000000 : 0x00000037] gpio_padcfg [0xaf, 32] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 32] DW1 [0x00000038 : 0x00000000 : 0x00000038] gpio_padcfg [0xaf, 33] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 33] DW1 [0x00000039 : 0x00000000 : 0x00000039] gpio_padcfg [0xaf, 34] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 34] DW1 [0x0000003a : 0x00000000 : 0x0000003a] gpio_padcfg [0xaf, 35] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 35] DW1 [0x0000003b : 0x00000000 : 0x0000003b] gpio_padcfg [0xaf, 36] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 36] DW1 [0x0000003c : 0x00000000 : 0x0000003c] gpio_padcfg [0xaf, 37] DW0 [0x44000700 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 37] DW1 [0x0000003d : 0x00000000 : 0x0000003d] gpio_padcfg [0xaf, 38] DW0 [0x44000200 : 0x40000201 : 0x40000201] gpio_padcfg [0xaf, 38] DW1 [0x0000003e : 0x00003000 : 0x0000303e] gpio_padcfg [0xaf, 39] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 39] DW1 [0x0000003f : 0x00000000 : 0x0000003f] gpio_padcfg [0xaf, 40] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 40] DW1 [0x00000040 : 0x00000000 : 0x00000040] gpio_padcfg [0xaf, 41] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 41] DW1 [0x00000041 : 0x00000000 : 0x00000041] gpio_padcfg [0xaf, 42] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 42] DW1 [0x00000042 : 0x00000000 : 0x00000042] gpio_padcfg [0xaf, 43] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 43] DW1 [0x00000043 : 0x00000000 : 0x00000043] gpio_padcfg [0xaf, 44] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 44] DW1 [0x00000044 : 0x00000000 : 0x00000044] gpio_padcfg [0xaf, 45] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 45] DW1 [0x00000045 : 0x00000000 : 0x00000045] gpio_padcfg [0xaf, 46] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xaf, 46] DW1 [0x00000046 : 0x00000000 : 0x00000046] gpio_padcfg [0xaf, 47] DW0 [0x44000200 : 0x40000400 : 0x40000400] gpio_padcfg [0xaf, 47] DW1 [0x00000047 : 0x00003000 : 0x00003047] gpio_padcfg [0xae, 00] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xae, 00] DW1 [0x00000048 : 0x00000000 : 0x00000048] gpio_padcfg [0xae, 01] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xae, 01] DW1 [0x00000049 : 0x00001000 : 0x00001049] gpio_padcfg [0xae, 02] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 02] DW1 [0x0000004a : 0x00000000 : 0x0000004a] gpio_padcfg [0xae, 03] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xae, 03] DW1 [0x0000004b : 0x00000000 : 0x0000004b] gpio_padcfg [0xae, 04] DW0 [0x44000702 : 0x40000400 : 0x40000402] gpio_padcfg [0xae, 04] DW1 [0x0000004c : 0x00000000 : 0x0000004c] gpio_padcfg [0xae, 05] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 05] DW1 [0x0000004d : 0x00000000 : 0x0000004d] gpio_padcfg [0xae, 06] DW0 [0xffffffff : 0x40000100 : 0x4801e1fe] gpio_padcfg [0xae, 06] DW1 [0xffffffff : 0x00000000 : 0xfdffc0ff] gpio_padcfg [0xae, 07] DW0 [0xffffffff : 0x40000100 : 0x4801e1fe] gpio_padcfg [0xae, 07] DW1 [0xffffffff : 0x00000000 : 0xfdffc0ff] gpio_padcfg [0xae, 08] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 08] DW1 [0x00000050 : 0x00000000 : 0x00000050] gpio_padcfg [0xae, 09] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 09] DW1 [0x00000051 : 0x00000000 : 0x00000051] gpio_padcfg [0xae, 10] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 10] DW1 [0x00000052 : 0x00000000 : 0x00000052] gpio_padcfg [0xae, 11] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 11] DW1 [0x00000053 : 0x00000000 : 0x00000053] gpio_padcfg [0xae, 12] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 12] DW1 [0x00000054 : 0x00000000 : 0x00000054] gpio_padcfg [0xae, 13] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 13] DW1 [0x00000055 : 0x00000000 : 0x00000055] gpio_padcfg [0xae, 14] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 14] DW1 [0x00000056 : 0x00000000 : 0x00000056] gpio_padcfg [0xae, 15] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 15] DW1 [0x00000057 : 0x00000000 : 0x00000057] gpio_padcfg [0xae, 16] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 16] DW1 [0x00000058 : 0x00000000 : 0x00000058] gpio_padcfg [0xae, 17] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 17] DW1 [0x00000059 : 0x00000000 : 0x00000059] gpio_padcfg [0xae, 18] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 18] DW1 [0x0000005a : 0x00000000 : 0x0000005a] gpio_padcfg [0xae, 19] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 19] DW1 [0x0000005b : 0x00000000 : 0x0000005b] gpio_padcfg [0xae, 20] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 20] DW1 [0x0000005c : 0x00000000 : 0x0000005c] gpio_padcfg [0xae, 21] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 21] DW1 [0x0000005d : 0x00000000 : 0x0000005d] gpio_padcfg [0xae, 22] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 22] DW1 [0x0000005e : 0x00000000 : 0x0000005e] gpio_padcfg [0xae, 23] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 23] DW1 [0x0000005f : 0x00000000 : 0x0000005f] gpio_padcfg [0xae, 24] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 24] DW1 [0x00000060 : 0x00000000 : 0x00000060] gpio_padcfg [0xae, 25] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 25] DW1 [0x00000061 : 0x00000000 : 0x00000061] gpio_padcfg [0xae, 26] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 26] DW1 [0x00000062 : 0x00000000 : 0x00000062] gpio_padcfg [0xae, 27] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 27] DW1 [0x00000063 : 0x00000000 : 0x00000063] gpio_padcfg [0xae, 28] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 28] DW1 [0x00000064 : 0x00000000 : 0x00000064] gpio_padcfg [0xae, 29] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 29] DW1 [0x00000065 : 0x00000000 : 0x00000065] gpio_padcfg [0xae, 29] DW0 [0x40000400 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 29] DW1 [0x00000065 : 0x00000000 : 0x00000065] gpio_padcfg [0xae, 29] DW0 [0x40000400 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 29] DW1 [0x00000065 : 0x00000000 : 0x00000065] gpio_padcfg [0xae, 29] DW0 [0x40000400 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 29] DW1 [0x00000065 : 0x00000000 : 0x00000065] gpio_padcfg [0xae, 33] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 33] DW1 [0x00000069 : 0x00000000 : 0x00000069] gpio_padcfg [0xae, 34] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 34] DW1 [0x0000006a : 0x00000000 : 0x0000006a] gpio_padcfg [0xae, 35] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 35] DW1 [0x0000006b : 0x00000000 : 0x0000006b] gpio_padcfg [0xae, 36] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 36] DW1 [0x0000006c : 0x00000000 : 0x0000006c] gpio_padcfg [0xae, 37] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 37] DW1 [0x0000006d : 0x00000000 : 0x0000006d] gpio_padcfg [0xae, 38] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 38] DW1 [0x0000006e : 0x00000000 : 0x0000006e] gpio_padcfg [0xae, 39] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 39] DW1 [0x0000006f : 0x00000000 : 0x0000006f] gpio_padcfg [0xae, 40] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 40] DW1 [0x00000070 : 0x00000000 : 0x00000070] gpio_padcfg [0xae, 41] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 41] DW1 [0x00000071 : 0x00000000 : 0x00000071] gpio_padcfg [0xae, 42] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 42] DW1 [0x00000072 : 0x00000000 : 0x00000072] gpio_padcfg [0xae, 43] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 43] DW1 [0x00000073 : 0x00000000 : 0x00000073] gpio_padcfg [0xae, 44] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 44] DW1 [0x00000074 : 0x00000000 : 0x00000074] gpio_padcfg [0xae, 45] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 45] DW1 [0x00000075 : 0x00000000 : 0x00000075] gpio_padcfg [0xae, 46] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 46] DW1 [0x00000076 : 0x00000000 : 0x00000076] gpio_padcfg [0xae, 47] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 47] DW1 [0x00000077 : 0x00000000 : 0x00000077] gpio_padcfg [0xae, 48] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 48] DW1 [0x00000018 : 0x00003010 : 0x00003018] gpio_padcfg [0xae, 49] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 49] DW1 [0x00000019 : 0x00003010 : 0x00003019] gpio_padcfg [0xae, 50] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xae, 50] DW1 [0x0000001a : 0x00003010 : 0x0000301a] gpio_padcfg [0xae, 51] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 51] DW1 [0x0000001b : 0x00000000 : 0x0000001b] gpio_padcfg [0xae, 52] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 52] DW1 [0x0000001c : 0x00000000 : 0x0000001c] gpio_padcfg [0xae, 53] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 53] DW1 [0x0000001d : 0x00000000 : 0x0000001d] gpio_padcfg [0xae, 54] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 54] DW1 [0x0000001e : 0x00000000 : 0x0000001e] gpio_padcfg [0xae, 55] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 55] DW1 [0x0000001f : 0x00000000 : 0x0000001f] gpio_padcfg [0xae, 56] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 56] DW1 [0x00000020 : 0x00000000 : 0x00000020] gpio_padcfg [0xae, 57] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 57] DW1 [0x00000021 : 0x00003000 : 0x00003021] gpio_padcfg [0xae, 58] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 58] DW1 [0x00000022 : 0x00003000 : 0x00003022] gpio_padcfg [0xae, 59] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 59] DW1 [0x00000023 : 0x00003000 : 0x00003023] gpio_padcfg [0xae, 60] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xae, 60] DW1 [0x00000024 : 0x00003000 : 0x00003024] gpio_padcfg [0xac, 00] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 00] DW1 [0x0000006d : 0x00003000 : 0x0000306d] gpio_padcfg [0xac, 01] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 01] DW1 [0x0000006e : 0x00003000 : 0x0000306e] gpio_padcfg [0xac, 02] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 02] DW1 [0x0000006f : 0x00003000 : 0x0000306f] gpio_padcfg [0xac, 03] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 03] DW1 [0x00000070 : 0x00000000 : 0x00000070] gpio_padcfg [0xac, 04] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 04] DW1 [0x00000071 : 0x00000000 : 0x00000071] gpio_padcfg [0xac, 05] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 05] DW1 [0x00000072 : 0x00000000 : 0x00000072] gpio_padcfg [0xac, 06] DW0 [0x44000200 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 06] DW1 [0x00000073 : 0x00000000 : 0x00000073] gpio_padcfg [0xac, 07] DW0 [0x44000300 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 07] DW1 [0x00000074 : 0x00000000 : 0x00000074] gpio_padcfg [0xac, 08] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 08] DW1 [0x00000075 : 0x00000000 : 0x00000075] gpio_padcfg [0xac, 09] DW0 [0x44000300 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 09] DW1 [0x00000076 : 0x00000000 : 0x00000076] gpio_padcfg [0xac, 10] DW0 [0x44000200 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 10] DW1 [0x00000077 : 0x00000000 : 0x00000077] gpio_padcfg [0xac, 11] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 11] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 12] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 12] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 13] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 13] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 14] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 14] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 15] DW0 [0x00000000 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 15] DW1 [0x00000000 : 0x00003000 : 0x00003000] gpio_padcfg [0xac, 16] DW0 [0x00000000 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 16] DW1 [0x00000000 : 0x00003000 : 0x00003000] gpio_padcfg [0xac, 17] DW0 [0x00000000 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 17] DW1 [0x00000000 : 0x00003000 : 0x00003000] gpio_padcfg [0xac, 18] DW0 [0x00000000 : 0x40000400 : 0x40000400] gpio_padcfg [0xac, 18] DW1 [0x00000000 : 0x00003000 : 0x00003000] gpio_padcfg [0xac, 19] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 19] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 20] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 20] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 21] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 21] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 22] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 22] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 23] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 23] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 24] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 24] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 25] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 25] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 26] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 26] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 27] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 27] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 28] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 28] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 29] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 29] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 30] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 30] DW1 [0x00000000 : 0x00000000 : 0x00000000] gpio_padcfg [0xac, 31] DW0 [0x00000000 : 0x40000100 : 0x40000100] gpio_padcfg [0xac, 31] DW1 [0x00000000 : 0x00000000 : 0x00000000] Not passing VBT to GOP ------- sata ENABLE 1 1 UPD values for SiliconInit: 7ab46348: 4b 42 4c 55 50 44 5f 53 00 00 00 00 00 00 00 00 KBLUPD_S........ 7ab46358: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46368: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 ................ 7ab46378: 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................ 7ab46388: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00 ................ 7ab46398: 00 00 01 01 01 01 00 01 01 01 00 00 00 00 00 00 ................ 7ab463a8: 00 00 01 01 00 00 00 00 00 00 00 00 00 00 00 29 ...............) 7ab463b8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0b ................ 7ab463c8: 0a 0b 0b 0b 0b 0b 0b 0e 09 09 00 00 00 00 00 00 ................ 7ab463d8: 00 01 00 07 07 07 07 00 07 07 07 00 00 00 00 00 ................ 7ab463e8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab463f8: 00 00 00 02 02 02 02 00 02 02 02 00 00 00 00 00 ................ 7ab46408: 00 00 00 01 01 01 01 00 01 01 01 00 00 00 00 00 ................ 7ab46418: 00 00 00 01 01 00 00 00 00 00 00 00 00 29 29 00 .............)). 7ab46428: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46498: 00 00 00 01 00 00 00 00 00 00 00 00 00 1f 1f 1f ................ 7ab464a8: 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f ................ 7ab464b8: 1f 1f 1f 1f 1f 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab464c8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46548: 86 80 15 20 00 02 01 00 01 00 01 00 01 01 01 4b ... ...........K 7ab46558: 4b 4b 00 00 00 01 06 01 00 01 01 00 00 00 d9 fe KK.............. 7ab46568: 00 10 d9 fe 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46578: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46588: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 01 ................ 7ab46598: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00 ................ 7ab465a8: 00 00 01 01 01 01 01 00 00 00 00 00 01 01 01 01 ................ 7ab465b8: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab465c8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab465e8: 00 00 00 00 00 00 00 00 00 00 00 00 50 00 50 00 ............P.P. 7ab465f8: 50 00 50 00 00 00 10 00 14 00 14 00 14 00 00 00 P.P............. 7ab46608: 04 00 04 00 04 00 04 00 00 00 1c 00 88 00 8c 00 ................ 7ab46618: 8c 00 00 00 f0 05 f0 05 f0 05 f0 05 00 00 00 00 ................ 7ab46628: 00 00 00 02 00 00 00 00 09 00 01 00 00 00 00 00 ................ 7ab46638: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 ................ 7ab46648: 01 01 01 00 00 00 0e 0e 0e 0d 0d 0d 0a 0a 09 0a ................ 7ab46658: bb bb bb bb cc cc 01 00 00 00 00 00 00 00 00 00 ................ 7ab46668: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46678: 00 00 00 00 00 00 00 00 00 02 04 00 00 00 02 00 ................ 7ab46688: 00 00 00 00 00 00 00 00 00 00 f0 1f 00 01 02 00 ................ 7ab46698: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 ................ 7ab466a8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46848: 00 00 00 00 00 00 00 00 00 01 02 03 04 05 06 07 ................ 7ab46858: 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 ................ 7ab46868: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab468d8: 00 00 00 00 00 00 00 00 04 04 04 04 04 04 04 04 ................ 7ab468e8: 04 04 04 04 04 04 04 04 04 04 04 04 04 04 04 04 ................ 7ab468f8: 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 ................ 7ab46908: 03 03 03 03 03 03 03 03 00 00 00 00 00 00 00 00 ................ 7ab46918: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46938: 00 00 00 00 00 00 00 00 06 06 06 06 06 06 06 06 ................ 7ab46948: 06 06 06 06 06 06 06 06 06 06 06 06 06 06 06 06 ................ 7ab46958: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................ 7ab46968: 02 02 02 02 02 02 02 02 06 04 08 02 0a 02 02 02 ................ 7ab46978: 02 02 00 00 00 00 00 00 01 00 00 00 00 00 00 00 ................ 7ab46988: 00 00 00 00 00 00 02 01 03 03 00 00 00 00 00 00 ................ 7ab46998: 00 00 01 00 00 00 00 00 01 01 00 00 00 00 00 02 ................ 7ab469a8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab469d8: 0f 0f 0f 0f 0f 0f 0f 0f 71 02 71 02 71 02 71 02 ........q.q.q.q. 7ab469e8: 71 02 71 02 71 02 71 02 00 00 00 00 00 00 00 00 q.q.q.q......... 7ab469f8: 00 01 01 01 01 01 01 00 01 01 01 01 00 00 00 00 ................ 7ab46a08: 00 00 64 64 64 00 00 00 00 00 01 00 00 00 00 00 ..ddd........... 7ab46a18: 00 00 00 00 00 00 02 01 01 00 00 01 00 00 00 00 ................ 7ab46a28: 00 00 01 00 00 00 01 01 00 01 00 00 00 00 01 02 ................ 7ab46a38: 03 00 01 02 03 00 00 00 00 00 01 00 00 00 00 00 ................ 7ab46a48: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46a68: 01 00 00 00 00 00 00 00 00 ff ff 00 00 00 00 00 ................ 7ab46a78: ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 ................ 7ab46a88: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46a98: 00 00 00 00 00 00 00 00 ff ff ff ff ff ff ff ff ................ 7ab46aa8: ff ff ff ff ff 00 00 00 ff ff ff ff ff ff ff ff ................ 7ab46ab8: ff ff ff ff ff ff ff ff 01 01 00 00 00 00 00 00 ................ 7ab46ac8: 54 45 53 54 00 00 02 00 00 ff ff ff 01 01 01 01 TEST............ 7ab46ad8: ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46ae8: 00 01 01 00 01 00 00 00 01 00 00 01 00 00 1c 14 ................ 7ab46af8: 00 1c 14 00 1c 14 00 00 00 00 00 00 00 00 01 01 ................ 7ab46b08: 01 01 00 01 02 02 00 00 00 00 ff 00 01 00 01 01 ................ 7ab46b18: 01 01 01 01 00 00 01 00 01 01 02 02 01 00 00 08 ................ 7ab46b28: 02 02 02 02 02 02 04 00 00 01 00 00 00 00 00 00 ................ 7ab46b38: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46b78: 00 00 00 00 00 00 00 00 00 00 00 00 4b 00 6b 00 ............K.k. 7ab46b88: 94 00 fa 00 4c 01 f2 03 58 1b 00 00 98 3a 00 00 ....L...X....:.. 7ab46b98: 98 3a 00 00 08 52 00 00 00 00 00 00 40 9c 00 00 .:...R......@... 7ab46ba8: 50 c3 00 00 40 9c 00 00 50 c3 00 00 40 9c 00 00 [email protected]...@... 7ab46bb8: 50 c3 00 00 00 00 00 00 00 00 00 00 ac 00 00 00 P............... 7ab46bc8: 00 00 00 00 00 00 00 00 00 00 ff 01 00 00 58 02 ..............X. 7ab46bd8: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7ab46be8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46c38: 00 00 00 00 02 02 02 02 02 02 02 02 02 02 02 02 ................ 7ab46c48: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................ 7ab46c58: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................ 7ab46c68: 02 02 02 02 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 ....<.<.<.<.<.<. 7ab46c78: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<. 7ab46c88: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<. 7ab46c98: 3c 00 3c 00 02 02 02 02 02 02 02 02 02 02 02 02 <.<............. 7ab46ca8: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................ 7ab46cb8: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................ 7ab46cc8: 02 02 02 02 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 ....<.<.<.<.<.<. 7ab46cd8: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<. 7ab46ce8: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<. 7ab46cf8: 3c 00 3c 00 00 00 00 00 00 00 00 00 00 00 00 00 <.<............. 7ab46d08: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46d38: 00 00 00 00 00 00 00 00 00 00 00 00 05 05 05 05 ................ 7ab46d48: 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 ................ 7ab46d58: 05 05 05 05 07 07 07 07 07 07 07 07 07 07 07 07 ................ 7ab46d68: 07 07 07 07 07 07 07 07 07 07 07 07 00 00 00 00 ................ 7ab46d78: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7ab46f58: 00 00 00 00 00 00 aa 55 .......U Calling FspSiliconInit: 0x7aae11ca 0x7ab46348: upd POST: 0x93 POST: 0x99 FspSiliconInit returned 0x00000000 BS: BS_DEV_INIT_CHIPS times (us): entry 306606 run 2601098 exit 0 POST: 0x72 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:16.4: enabled 0 PCI: 00:17.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1c.5: enabled 1 PCI: 00:1c.6: enabled 1 PCI: 00:1c.7: enabled 1 PCI: 00:1d.0: enabled 1 PCI: 00:1d.1: enabled 1 PCI: 00:1d.2: enabled 1 PCI: 00:1d.3: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1e.1: enabled 0 PCI: 00:1e.2: enabled 1 PCI: 00:1e.3: enabled 1 PCI: 00:1e.4: enabled 0 PCI: 00:1e.5: enabled 1 PCI: 00:1e.6: enabled 0 PCI: 00:1f.0: enabled 1 PCI: 00:1f.1: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 00:1f.6: enabled 0 APIC: 04: enabled 1 APIC: 06: enabled 1 APIC: 02: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: 04: enabled 1 APIC: 06: enabled 1 APIC: 02: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:16.4: enabled 0 PCI: 00:17.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1c.5: enabled 1 PCI: 00:1c.6: enabled 1 PCI: 00:1c.7: enabled 1 PCI: 00:1d.0: enabled 1 PCI: 00:1d.1: enabled 1 PCI: 00:1d.2: enabled 1 PCI: 00:1d.3: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1e.1: enabled 0 PCI: 00:1e.2: enabled 1 PCI: 00:1e.3: enabled 1 PCI: 00:1e.4: enabled 0 PCI: 00:1e.5: enabled 1 PCI: 00:1e.6: enabled 0 PCI: 00:1f.0: enabled 1 PCI: 00:1f.1: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 00:1f.6: enabled 0 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 POST: 0x24 PCI: 00:00.0 [8086/0000] ops PCI: 00:00.0 [8086/191f] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/1912] enabled PCI: 00:04.0 [8086/1903] enabled PCI: 00:08.0 [8086/1911] enabled PCI: 00:14.0 [8086/0000] ops PCI: 00:14.0 [8086/a12f] enabled perepelitsin : id - ffffffff PCI: 00:14.2 [8086/a131] enabled PCI: 00:16.0 [8086/a13a] enabled perepelitsin : id - ffffffff perepelitsin : id - ffffffff perepelitsin : id - ffffffff perepelitsin : id - ffffffff perepelitsin : id - ffffffff PCI: Static device PCI: 00:17.0 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.0 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.1 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.2 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.3 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.4 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.5 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.6 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1c.7 not found, disabling it. PCI: 00:1d.0 [8086/0000] bus ops PCI: 00:1d.0 [8086/a118] enabled PCI: 00:1d.1 [8086/0000] bus ops PCI: 00:1d.1 [8086/a119] enabled perepelitsin : id - ffffffff PCI: Static device PCI: 00:1d.2 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1d.3 not found, disabling it. perepelitsin : id - ffffffff perepelitsin : id - ffffffff perepelitsin : id - ffffffff PCI: Static device PCI: 00:1e.2 not found, disabling it. perepelitsin : id - ffffffff PCI: Static device PCI: 00:1e.3 not found, disabling it. perepelitsin : id - ffffffff perepelitsin : id - ffffffff PCI: Static device PCI: 00:1e.5 not found, disabling it. perepelitsin : id - ffffffff PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/a143] enabled perepelitsin : id - ffffffff PCI: Static device PCI: 00:1f.1 not found, disabling it. PCI: 00:1f.2 [8086/0000] bus ops PCI: 00:1f.2 [8086/a121] enabled PCI: 00:1f.3 [8086/a170] enabled PCI: 00:1f.4 [8086/0000] bus ops PCI: 00:1f.4 [8086/a123] enabled PCI: 00:1f.5 [8086/a124] enabled perepelitsin : id - ffffffff POST: 0x25 PCI: 00:1d.0 scanning... do_pci_scan_bridge for PCI: 00:1d.0 PCI: pci_scan_bus for bus 01 POST: 0x24 PCI: 01:00.0 [10ec/8168] enabled POST: 0x25 POST: 0x55 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x10 @ 0x70 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L1 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x10 @ 0x70 scan_bus: scanning of bus PCI: 00:1d.0 took 38459 usecs PCI: 00:1d.1 scanning... do_pci_scan_bridge for PCI: 00:1d.1 PCI: pci_scan_bus for bus 02 POST: 0x24 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x0d @ 0xc0 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 PCI: 02:00.0 subordinate PCI PCI: 02:00.0 [1b21/1080] enabled POST: 0x25 PCI: 02:00.0 scanning... do_pci_scan_bridge for PCI: 02:00.0 PCI: pci_scan_bus for bus 03 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: scanning of bus PCI: 02:00.0 took 11653 usecs POST: 0x55 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 PCIE CLK PM is not supported by endpoint ASPM: Enabled None Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Failed to enable LTR for dev = PCI: 02:00.0 scan_bus: scanning of bus PCI: 00:1d.1 took 81513 usecs PCI: 00:1f.0 scanning... scan_lpc_bus for PCI: 00:1f.0 scan_lpc_bus for PCI: 00:1f.0 done scan_bus: scanning of bus PCI: 00:1f.0 took 8308 usecs PCI: 00:1f.2 scanning... scan_lpc_bus for PCI: 00:1f.2 scan_lpc_bus for PCI: 00:1f.2 done scan_bus: scanning of bus PCI: 00:1f.2 took 8350 usecs PCI: 00:1f.4 scanning... scan_generic_bus for PCI: 00:1f.4 scan_generic_bus for PCI: 00:1f.4 done scan_bus: scanning of bus PCI: 00:1f.4 took 8947 usecs POST: 0x55 scan_bus: scanning of bus DOMAIN: 0000 took 391110 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 409442 usecs done MRC: Checking cached data update for 'RW_MRC_CACHE'. MRC: no data in 'RW_MRC_CACHE' MRC: cache data 'RW_MRC_CACHE' needs update. MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'. BS: BS_DEV_ENUMERATE times (us): entry 0 run 626778 exit 26818 POST: 0x73 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:1d.0 read_resources bus 1 link: 0 PCI: 00:1d.0 read_resources bus 1 link: 0 done PCI: 00:1d.1 read_resources bus 2 link: 0 PCI: 02:00.0 read_resources bus 3 link: 0 PCI: 02:00.0 read_resources bus 3 link: 0 done PCI: 00:1d.1 read_resources bus 2 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PCI: 00:1f.0 read_resources bus 0 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 1 PCI: 00:1f.0 read_resources bus 0 link: 1 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 04 APIC: 06 APIC: 02 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base e0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1 PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2 PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 6 PCI: 00:00.0 resource base c0000 size 7af40000 align 0 gran 0 limit 0 flags e0004200 index 7 PCI: 00:00.0 resource base 7b000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9 PCI: 00:00.0 resource base 7b800000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 resource base 100000000 size 17f000000 align 0 gran 0 limit 0 flags e0004200 index b PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 PCI: 00:08.0 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.0 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:16.4 PCI: 00:17.0 PCI: 00:1c.0 PCI: 00:1c.1 PCI: 00:1c.2 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 child on link 0 PCI: 01:00.0 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20 PCI: 00:1d.1 child on link 0 PCI: 02:00.0 PCI: 00:1d.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1d.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1d.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 02:00.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 02:00.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1d.2 PCI: 00:1d.3 PCI: 00:1e.0 PCI: 00:1e.1 PCI: 00:1e.2 PCI: 00:1e.3 PCI: 00:1e.4 PCI: 00:1e.5 PCI: 00:1e.6 PCI: 00:1f.0 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.1 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 48 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 PCI: 00:1f.3 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.3 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 20 PCI: 00:1f.4 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.5 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:1f.6 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 01:00.0 10 * [0x0 - 0xff] io PCI: 00:1d.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1d.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 02:00.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 02:00.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:1d.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1d.0 1c * [0x0 - 0xfff] io PCI: 00:02.0 20 * [0x1000 - 0x103f] io DOMAIN: 0000 io: base: 1040 size: 1040 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 20 * [0x0 - 0x3fff] mem PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem PCI: 00:1d.0 mem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1d.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 02:00.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 02:00.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1d.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1d.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1d.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem PCI: 00:14.0 10 * [0x11100000 - 0x1110ffff] mem PCI: 00:1f.3 20 * [0x11110000 - 0x1111ffff] mem PCI: 00:04.0 10 * [0x11120000 - 0x11127fff] mem PCI: 00:1f.2 10 * [0x11128000 - 0x1112bfff] mem PCI: 00:1f.3 10 * [0x1112c000 - 0x1112ffff] mem PCI: 00:08.0 10 * [0x11130000 - 0x11130fff] mem PCI: 00:14.2 10 * [0x11131000 - 0x11131fff] mem PCI: 00:16.0 10 * [0x11132000 - 0x11132fff] mem PCI: 00:1f.5 10 * [0x11133000 - 0x11133fff] mem PCI: 00:1f.4 10 * [0x11134000 - 0x111340ff] mem DOMAIN: 0000 mem: base: 11134100 size: 11134100 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI: 00:00.0 00 base e0000000 limit e3ffffff mem (fixed) constrain_resources: PCI: 00:00.0 06 base 00000000 limit 0009ffff mem (fixed) constrain_resources: PCI: 00:00.0 07 base 000c0000 limit 7affffff mem (fixed) constrain_resources: PCI: 00:00.0 09 base 7b000000 limit 7b7fffff mem (fixed) constrain_resources: PCI: 00:00.0 0a base 7b800000 limit 7fffffff mem (fixed) constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:1f.2 40 base 00001800 limit 000018ff io (fixed) constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed) avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff Setting resources... DOMAIN: 0000 io: base:1900 size:1040 align:12 gran:0 limit:ef9f PCI: 00:1d.0 1c * [0x2000 - 0x2fff] io PCI: 00:02.0 20 * [0x3000 - 0x303f] io DOMAIN: 0000 io: next_base: 3040 size: 1040 align: 12 gran: 0 done PCI: 00:1d.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff PCI: 01:00.0 10 * [0x2000 - 0x20ff] io PCI: 00:1d.0 io: next_base: 2100 size: 1000 align: 12 gran: 12 done PCI: 00:1d.1 io: base:ef9f size:0 align:12 gran:12 limit:ef9f PCI: 00:1d.1 io: next_base: ef9f size: 0 align: 12 gran: 12 done PCI: 02:00.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f PCI: 02:00.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done DOMAIN: 0000 mem: base:c0000000 size:11134100 align:28 gran:0 limit:dfffffff PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem PCI: 00:14.0 10 * [0xd1100000 - 0xd110ffff] mem PCI: 00:1f.3 20 * [0xd1110000 - 0xd111ffff] mem PCI: 00:04.0 10 * [0xd1120000 - 0xd1127fff] mem PCI: 00:1f.2 10 * [0xd1128000 - 0xd112bfff] mem PCI: 00:1f.3 10 * [0xd112c000 - 0xd112ffff] mem PCI: 00:08.0 10 * [0xd1130000 - 0xd1130fff] mem PCI: 00:14.2 10 * [0xd1131000 - 0xd1131fff] mem PCI: 00:16.0 10 * [0xd1132000 - 0xd1132fff] mem PCI: 00:1f.5 10 * [0xd1133000 - 0xd1133fff] mem PCI: 00:1f.4 10 * [0xd1134000 - 0xd11340ff] mem DOMAIN: 0000 mem: next_base: d1134100 size: 11134100 align: 28 gran: 0 done PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff PCI: 01:00.0 20 * [0xd1000000 - 0xd1003fff] mem PCI: 01:00.0 18 * [0xd1004000 - 0xd1004fff] mem PCI: 00:1d.0 mem: next_base: d1005000 size: 100000 align: 20 gran: 20 done PCI: 00:1d.1 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:1d.1 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 02:00.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 02:00.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:1d.1 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:1d.1 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 02:00.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 02:00.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io PCI: 00:04.0 10 <- [0x00d1120000 - 0x00d1127fff] size 0x00008000 gran 0x0f mem64 PCI: 00:08.0 10 <- [0x00d1130000 - 0x00d1130fff] size 0x00001000 gran 0x0c mem64 PCI: 00:14.0 10 <- [0x00d1100000 - 0x00d110ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:14.2 10 <- [0x00d1131000 - 0x00d1131fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.0 10 <- [0x00d1132000 - 0x00d1132fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1d.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 00:1d.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 01:00.0 18 <- [0x00d1004000 - 0x00d1004fff] size 0x00001000 gran 0x0c mem64 PCI: 01:00.0 20 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1d.0 assign_resources, bus 1 link: 0 PCI: 00:1d.1 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1d.1 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1d.1 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:1d.1 assign_resources, bus 2 link: 0 PCI: 02:00.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 03 io PCI: 02:00.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 02:00.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:1d.1 assign_resources, bus 2 link: 0 PCI: 00:1f.2 10 <- [0x00d1128000 - 0x00d112bfff] size 0x00004000 gran 0x0e mem PCI: 00:1f.3 10 <- [0x00d112c000 - 0x00d112ffff] size 0x00004000 gran 0x0e mem64 PCI: 00:1f.3 20 <- [0x00d1110000 - 0x00d111ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:1f.4 10 <- [0x00d1134000 - 0x00d11340ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.5 10 <- [0x00d1133000 - 0x00d1133fff] size 0x00001000 gran 0x0c mem DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 04 APIC: 06 APIC: 02 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 1900 size 1040 align 12 gran 0 limit ef9f flags 40040100 index 10000000 DOMAIN: 0000 resource base c0000000 size 11134100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base e0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1 PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2 PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 6 PCI: 00:00.0 resource base c0000 size 7af40000 align 0 gran 0 limit 0 flags e0004200 index 7 PCI: 00:00.0 resource base 7b000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9 PCI: 00:00.0 resource base 7b800000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 resource base 100000000 size 17f000000 align 0 gran 0 limit 0 flags e0004200 index b PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d PCI: 00:02.0 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18 PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base d1120000 size 8000 align 15 gran 15 limit d1127fff flags 60000201 index 10 PCI: 00:08.0 PCI: 00:08.0 resource base d1130000 size 1000 align 12 gran 12 limit d1130fff flags 60000201 index 10 PCI: 00:14.0 PCI: 00:14.0 resource base d1100000 size 10000 align 16 gran 16 limit d110ffff flags 60000201 index 10 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.2 resource base d1131000 size 1000 align 12 gran 12 limit d1131fff flags 60000201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base d1132000 size 1000 align 12 gran 12 limit d1132fff flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:16.4 PCI: 00:17.0 PCI: 00:1c.0 PCI: 00:1c.1 PCI: 00:1c.2 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 child on link 0 PCI: 01:00.0 PCI: 00:1d.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10 PCI: 01:00.0 resource base d1004000 size 1000 align 12 gran 12 limit d1004fff flags 60000201 index 18 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 20 PCI: 00:1d.1 child on link 0 PCI: 02:00.0 PCI: 00:1d.1 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c PCI: 00:1d.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:1d.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c PCI: 02:00.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 02:00.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 PCI: 00:1d.2 PCI: 00:1d.3 PCI: 00:1e.0 PCI: 00:1e.1 PCI: 00:1e.2 PCI: 00:1e.3 PCI: 00:1e.4 PCI: 00:1e.5 PCI: 00:1e.6 PCI: 00:1f.0 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.1 PCI: 00:1f.2 PCI: 00:1f.2 resource base d1128000 size 4000 align 14 gran 14 limit d112bfff flags 60000200 index 10 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 48 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 PCI: 00:1f.3 PCI: 00:1f.3 resource base d112c000 size 4000 align 14 gran 14 limit d112ffff flags 60000201 index 10 PCI: 00:1f.3 resource base d1110000 size 10000 align 16 gran 16 limit d111ffff flags 60000201 index 20 PCI: 00:1f.4 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20 PCI: 00:1f.4 resource base d1134000 size 100 align 12 gran 8 limit d11340ff flags 60000201 index 10 PCI: 00:1f.5 PCI: 00:1f.5 resource base d1133000 size 1000 align 12 gran 12 limit d1133fff flags 60000200 index 10 PCI: 00:1f.6 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 1826024 exit 33 0x00000020: notify_params->phase Calling FspNotify: 0x7aae11c0 0x7ab46f7c: notify_params POST: 0x94 POST: 0x94 FspNotify returned 0x00000000 POST: 0x74 Enabling resources... PCI: 00:00.0 subsystem <- 8086/191f PCI: 00:00.0 cmd <- 06 PCI: 00:02.0 subsystem <- 8086/1912 PCI: 00:02.0 cmd <- 03 PCI: 00:04.0 cmd <- 02 PCI: 00:08.0 cmd <- 06 PCI: 00:14.0 subsystem <- 8086/a12f PCI: 00:14.0 cmd <- 02 PCI: 00:14.2 subsystem <- 8086/a131 PCI: 00:14.2 cmd <- 02 PCI: 00:16.0 subsystem <- 8086/a13a PCI: 00:16.0 cmd <- 06 PCI: 00:1d.0 bridge ctrl <- 0003 PCI: 00:1d.0 subsystem <- 8086/a118 PCI: 00:1d.0 cmd <- 07 PCI: 00:1d.1 bridge ctrl <- 0003 PCI: 00:1d.1 subsystem <- 8086/a119 PCI: 00:1d.1 cmd <- 00 PCI: 00:1f.0 subsystem <- 8086/a143 PCI: 00:1f.0 cmd <- 07 PCI: 00:1f.2 subsystem <- 8086/a121 PCI: 00:1f.2 cmd <- 06 PCI: 00:1f.3 subsystem <- 8086/a170 PCI: 00:1f.3 cmd <- 02 PCI: 00:1f.4 subsystem <- 8086/a123 PCI: 00:1f.4 cmd <- 03 PCI: 00:1f.5 subsystem <- 8086/a124 PCI: 00:1f.5 cmd <- 406 PCI: 01:00.0 cmd <- 03 PCI: 02:00.0 bridge ctrl <- 0003 PCI: 02:00.0 cmd <- 00 done. BS: BS_DEV_ENABLE times (us): entry 13445 run 87606 exit 0 POST: 0x75 Initializing devices... Root Device init ... Root Device init finished in 1951 usecs POST: 0x75 CPU_CLUSTER: 0 init ... CPU_CLUSTER: 0 init finished in 2240 usecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:00.0 init ... CPU TDP: 65 Watts CPU PL2 = 81 Watts PCI: 00:00.0 init finished in 6576 usecs POST: 0x75 PCI: 00:02.0 init ... [6.127404] CONFIG => [6.129398] (Primary => [6.131927] (Port => DP3 , [6.135148] Framebuffer => [6.138096] (Width => 1920, [6.141467] Height => 1080, [6.144792] Stride => 1920, [6.148160] Offset => 0x00000000, [6.152051] BPC => 8), [6.155239] Mode => [6.157502] (Dotclock => 148500000, [6.162391] H_Visible => 1920, [6.166876] H_Sync_Begin => 2008, [6.171328] H_Sync_End => 2052, [6.175730] H_Total => 2200, [6.180196] V_Visible => 1080, [6.184634] V_Sync_Begin => 1084, [6.189106] V_Sync_End => 1089, [6.193542] V_Total => 1125, [6.197963] H_Sync_Active_High => True, [6.202409] V_Sync_Active_High => True, [6.206821] BPC => 5)), [6.211142] Secondary => [6.213656] (Port => Disabled, [6.216883] Framebuffer => [6.219846] (Width => 1, [6.222957] Height => 1, [6.225993] Stride => 1, [6.229086] Offset => 0x00000000, [6.232978] BPC => 8), [6.236105] Mode => [6.238397] (Dotclock => 24000000, [6.243230] H_Visible => 1, [6.247446] H_Sync_Begin => 1, [6.251621] H_Sync_End => 1, [6.255802] H_Total => 1, [6.259956] V_Visible => 1, [6.264084] V_Sync_Begin => 1, [6.268262] V_Sync_End => 1, [6.272406] V_Total => 1, [6.276537] H_Sync_Active_High => False, [6.281134] V_Sync_Active_High => False, [6.285687] BPC => 5)), [6.290028] Tertiary => [6.292478] (Port => Disabled, [6.295768] Framebuffer => [6.298703] (Width => 1, [6.301749] Height => 1, [6.304806] Stride => 1, [6.307845] Offset => 0x00000000, [6.311743] BPC => 8), [6.314906] Mode => [6.317210] (Dotclock => 24000000, [6.322010] H_Visible => 1, [6.326169] H_Sync_Begin => 1, [6.330364] H_Sync_End => 1, [6.334487] H_Total => 1, [6.338657] V_Visible => 1, [6.342764] V_Sync_Begin => 1, [6.346867] V_Sync_End => 1, [6.351008] V_Total => 1, [6.355153] H_Sync_Active_High => False, [6.359650] V_Sync_Active_High => False, [6.364158] BPC => 5))); PCI: 00:02.0 init finished in 989849 usecs POST: 0x75 PCI: 00:04.0 init ... PCI: 00:04.0 init finished in 2077 usecs POST: 0x75 PCI: 00:08.0 init ... PCI: 00:08.0 init finished in 2088 usecs POST: 0x75 PCI: 00:14.0 init ... PCI: 00:14.0 init finished in 2076 usecs POST: 0x75 POST: 0x75 PCI: 00:14.2 init ... PCI: 00:14.2 init finished in 2102 usecs POST: 0x75 PCI: 00:16.0 init ... PCI: 00:16.0 init finished in 2076 usecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:1d.0 init ... Initializing PCH PCIe bridge. PCI: 00:1d.0 init finished in 4852 usecs POST: 0x75 PCI: 00:1d.1 init ... Initializing PCH PCIe bridge. PCI: 00:1d.1 init finished in 4848 usecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:1f.0 init ... IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: Dumping registers reg 0x0000: 0x02000000 reg 0x0001: 0x00770020 reg 0x0002: 0x00000000 PCI: 00:1f.0 init finished in 21425 usecs POST: 0x75 POST: 0x75 PCI: 00:1f.2 init ... RTC Init Set power on after power failure. misccfg_mask:fff000ff misccfg_value:43100 Disabling ACPI via APMC: done. Disabling Deep S3 Disabling Deep S3 Disabling Deep S4 Disabling Deep S4 Disabling Deep S5 Disabling Deep S5 PCI: 00:1f.2 init finished in 23507 usecs POST: 0x75 PCI: 00:1f.3 init ... PCI: 00:1f.3 init finished in 2112 usecs POST: 0x75 PCI: 00:1f.4 init ... PCI: 00:1f.4 init finished in 2059 usecs POST: 0x75 PCI: 00:1f.5 init ... PCI: 00:1f.5 init finished in 2095 usecs POST: 0x75 POST: 0x75 PCI: 01:00.0 init ... PCI: 01:00.0 init finished in 2083 usecs POST: 0x75 Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:16.4: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1d.1: enabled 1 PCI: 00:1d.2: enabled 0 PCI: 00:1d.3: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1e.1: enabled 0 PCI: 00:1e.2: enabled 0 PCI: 00:1e.3: enabled 0 PCI: 00:1e.4: enabled 0 PCI: 00:1e.5: enabled 0 PCI: 00:1e.6: enabled 0 PCI: 00:1f.0: enabled 1 PCI: 00:1f.1: enabled 0 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 00:1f.6: enabled 0 APIC: 04: enabled 1 APIC: 06: enabled 1 APIC: 02: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:08.0: enabled 1 PCI: 01:00.0: enabled 1 PCI: 02:00.0: enabled 1 MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b800000 size 0x7b740000 type 6 0x000000007b800000 - 0x00000000c0000000 size 0x44800000 type 0 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 0x0000000100000000 - 0x000000027f000000 size 0x17f000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 6/10. MTRR: WB selected as default type. MTRR: 0 base 0x000000007b800000 mask 0x0000007fff800000 type 0 MTRR: 1 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 2 base 0x0000000080000000 mask 0x0000007fc0000000 type 0 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() MTRR: TEMPORARY Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b800000 size 0x7b740000 type 6 0x000000007b800000 - 0x00000000ff800000 size 0x84000000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x000000027f000000 size 0x17f000000 type 6 call enable_fixed_mtrr() call enable_fixed_mtrr() CPU physical address size: 39 bits MTRR: Removing WRCOMB type. WB/UC MTRR counts: 11/10 > 8. CPU physical address size: 39 bits CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 11/10. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6 MTRR: 1 base 0x0000000040000000 mask 0x0000007fe0000000 type 6 MTRR: 2 base 0x0000000060000000 mask 0x0000007ff0000000 type 6 MTRR: 3 base 0x0000000070000000 mask 0x0000007ff8000000 type 6 MTRR: 4 base 0x0000000078000000 mask 0x0000007ffc000000 type 6 MTRR: 5 base 0x000000007b800000 mask 0x0000007fff800000 type 0 MTRR: 6 base 0x00000000ff800000 mask 0x0000007fff800000 type 5 MTRR: 7 base 0x0000000100000000 mask 0x0000007f00000000 type 6 Taking a reserved OS MTRR. MTRR: 8 base 0x0000000200000000 mask 0x0000007f80000000 type 6 Taking a reserved OS MTRR. MTRR: 9 base 0x000000027f000000 mask 0x0000007fff000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93 BS: BS_DEV_INIT times (us): entry 0 run 1305265 exit 398854 POST: 0x76 Finalize devices... Devices finalized HDA: base = d112c000 HDA: codec_mask = 05 HDA: Initializing codec #2 HDA: codec viddid: 80862809 HDA: No verb table entry found HDA: Initializing codec #0 HDA: codec viddid: 10ec0887 HDA: No verb table entry found BS: BS_POST_DEVICE times (us): entry 0 run 4690 exit 23012 POST: 0x77 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1089 exit 0 POST: 0x79 POST: 0x9c CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset ceb40 size 3219 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7aaa5000. ACPI: * FACS ACPI: * DSDT SGX: not enabled or not supported. skip gnvs fill ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4 core(s) each. ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TCPA TCPA log created at 7aa94000 ACPI: added table 4/32, length now 52 ACPI: * MADT SCI is IRQ9 ACPI: added table 5/32, length now 56 current = 7aaa89b0 acpi_write_dbg2_pci_uart: Device not found ACPI: * HPET ACPI: added table 6/32, length now 60 ACPI: done. ACPI tables: 14832 bytes. smbios_write_tables: 7aa93000 CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'serial_number' CBFS: 'serial_number' not found. Create SMBIOS type 17 Root Device (Purism Librem 13 v2) CPU_CLUSTER: 0 (Intel 6th Gen) APIC: 00 (Intel 6th Gen) DOMAIN: 0000 (Intel 6th Gen) PCI: 00:00.0 (Intel 6th Gen) PCI: 00:02.0 (Intel 6th Gen) PCI: 00:14.0 (Intel 6th Gen) PCI: 00:14.1 (Intel 6th Gen) PCI: 00:14.2 (Intel 6th Gen) PCI: 00:16.0 (Intel 6th Gen) PCI: 00:16.1 (Intel 6th Gen) PCI: 00:16.2 (Intel 6th Gen) PCI: 00:16.3 (Intel 6th Gen) PCI: 00:16.4 (Intel 6th Gen) PCI: 00:17.0 (Intel 6th Gen) PCI: 00:1c.0 (Intel 6th Gen) PCI: 00:1c.1 (Intel 6th Gen) PCI: 00:1c.2 (Intel 6th Gen) PCI: 00:1c.3 (Intel 6th Gen) PCI: 00:1c.4 (Intel 6th Gen) PCI: 00:1c.5 (Intel 6th Gen) PCI: 00:1c.6 (Intel 6th Gen) PCI: 00:1c.7 (Intel 6th Gen) PCI: 00:1d.0 (Intel 6th Gen) PCI: 00:1d.1 (Intel 6th Gen) PCI: 00:1d.2 (Intel 6th Gen) PCI: 00:1d.3 (Intel 6th Gen) PCI: 00:1e.0 (Intel 6th Gen) PCI: 00:1e.1 (Intel 6th Gen) PCI: 00:1e.2 (Intel 6th Gen) PCI: 00:1e.3 (Intel 6th Gen) PCI: 00:1e.4 (Intel 6th Gen) PCI: 00:1e.5 (Intel 6th Gen) PCI: 00:1e.6 (Intel 6th Gen) PCI: 00:1f.0 (Intel 6th Gen) PCI: 00:1f.1 (Intel 6th Gen) PCI: 00:1f.2 (Intel 6th Gen) PCI: 00:1f.3 (Intel 6th Gen) PCI: 00:1f.4 (Intel 6th Gen) PCI: 00:1f.5 (Intel 6th Gen) PCI: 00:1f.6 (Intel 6th Gen) APIC: 04 (unknown) APIC: 06 (unknown) APIC: 02 (unknown) PCI: 00:04.0 (unknown) PCI: 00:08.0 (unknown) PCI: 01:00.0 (unknown) PCI: 02:00.0 (unknown) SMBIOS tables: 362 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum f531 Writing coreboot table at 0x7aac9000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007aa92fff: RAM 4. 000000007aa93000-000000007affffff: CONFIGURATION TABLES 5. 000000007b000000-000000007fffffff: RESERVED 6. 00000000e0000000-00000000e3ffffff: RESERVED 7. 00000000fe000000-00000000fe00ffff: RESERVED 8. 00000000fed10000-00000000fed19fff: RESERVED 9. 00000000fed80000-00000000fed84fff: RESERVED 10. 0000000100000000-000000027effffff: RAM CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) Wrote coreboot table at: 7aac9000, 0x434 bytes, checksum 46bb coreboot table: 1100 bytes. IMD ROOT 0. 7afff000 00001000 IMD SMALL 1. 7affe000 00001000 FSP MEMORY 2. 7abfe000 00400000 CONSOLE 3. 7abde000 00020000 TIME STAMP 4. 7abdd000 00000400 MRC DATA 5. 7abdb000 00001878 ROMSTG STCK 6. 7abda000 00000400 AFTER CAR 7. 7abcd000 0000d000 RAMSTAGE 8. 7ab0f000 000be000 REFCODE 9. 7aae1000 0002e000 SMM BACKUP 10. 7aad1000 00010000 COREBOOT 11. 7aac9000 00008000 ACPI 12. 7aaa5000 00024000 ACPI GNVS 13. 7aaa4000 00001000 TCPA LOG 14. 7aa94000 00010000 SMBIOS 15. 7aa93000 00000800 IMD small region: IMD ROOT 0. 7affec00 00000400 FSP RUNTIME 1. 7affebe0 00000004 POWER STATE 2. 7affeba0 00000040 ROMSTAGE 3. 7affeb80 00000004 MEM INFO 4. 7affea20 00000141 GNVS PTR 5. 7affea00 00000004 COREBOOTFWD 6. 7affe9c0 00000028 BS: BS_WRITE_TABLES times (us): entry 0 run 384821 exit 0 POST: 0x7a CBFS: 'Master Header Locator' located CBFS at [260100:7fffc0) CBFS: Locating 'fallback/payload' CBFS: Found @ offset d1dc0 size 18053 Loading segment from ROM address 0xffb31ef8 code (compression=2) New segment dstaddr 0xdc600 memsize 0x23a00 srcaddr 0xffb31f30 filesize 0x1801b Loading segment from ROM address 0xffb31f14 Entry Point 0x000fca9b Payload being loaded at below 1MiB without region being marked as RAM usable. Loading Segment: addr: 0x00000000000dc600 memsz: 0x0000000000023a00 filesz: 0x000000000001801b lb: [0x000000007ab10000, 0x000000007abccc90) Post relocation: addr: 0x00000000000dc600 memsz: 0x0000000000023a00 filesz: 0x000000000001801b using LZ4 [ 0x000dc600, 00100000, 0x00100000) <- ffb31f30 dest 000dc600, end 00100000, bouncebuffer ffffffff Loaded segments 0x00000040: notify_params->phase Calling FspNotify: 0x7aae11c0 0x7ab46f6c: notify_params POST: 0x95 POST: 0x95 FspNotify returned 0x00000000 0x000000f0: notify_params->phase Calling FspNotify: 0x7aae11c0 0x7ab46f7c: notify_params POST: 0x88 POST: 0x89 FspNotify returned 0x00000000 Finalizing chipset. ME: Host Firmware Status Register 1 : 0x90000255 ME: Host Firmware Status Register 2 : 0x66000306 ME: Host Firmware Status Register 3 : 0x00000020 ME: Host Firmware Status Register 4 : 0x00084000 ME: Host Firmware Status Register 5 : 0x00000000 ME: Host Firmware Status Register 6 : 0x00000002 ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : YES ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: D3 Support : NO ME: D0i3 Support : YES ME: Low Power State Enabled : YES ME: CPU Replaced : NO ME: CPU Replacement Valid : YES ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Host Communication ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : Host communication established ME: Power Down Mitigation : NO ME: FPF status : unfused Finalizing SMM. POST: 0xfe BS: BS_PAYLOAD_LOAD times (us): entry 0 run 82034 exit 143623 POST: 0x7b Jumping to boot code at 000fca9b(7aac9000) POST: 0xf8 CPU0: stack: 7ab46000 - 7ab47000, lowest used address 7ab460b8, stack used: 3912 bytes
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