On Sat, May 5, 2018 at 4:26 PM, Kyösti Mälkki <[email protected]> wrote: > On Sun, May 6, 2018 at 12:17 AM, Aaron Durbin <[email protected]> wrote: >>> I find it particularly hard to be civil on your first question, so >>> trying with sarcasm instead. After 5000 or so development hours and >>> direct support from AMD, is the boot sequence for soc/stoneyridge >>> prototypes equally bad, that is, AP CPUs execute through bootblock and >>> verstage? >> >> They currently jump to where they are told at the moment. See >> bootblock_c_entry() in src/soc/amd/stoneyridge/bootblock/bootblock.c. >> There is no running through multiple stages within coreboot. > > I think CAR_GLOBAL equally fails with soc/amd/stoneyridge if you had > SoC with multiple compute units where MTRRs are not shared, thus setup > becomes asymmetric between some cores. Marshall's experiments support > this happens.
Agreed. That's a concern w/ running APs through all the stages and not having a symmetric view of the address space. > >> I think you are right that guarding things w/ boot_cpu() would work. >> Is CONFIG_SQUELCH_EARLY_SMP set for all those types of boards? Or do >> we have a weird mix? Or should we have a Kconfig that says 'CAR' is >> not symmetric across cpus thus can't be used? > > I would rather grant AP CPUs access to CAR_GLOBALs by manipulating the > MTRR setup. > > Kyösti -- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot
