Hi Jose, I probably made a mistake and erased the main BIOS chip (and also the secondary one) Currently my target is not booting OS at all. So I can not try Mariusz procedure. Hope to have an identical target soon.
Thank you very much for your help, Zvika On Thu, Oct 4, 2018 at 6:31 PM Jose Trujillo <[email protected]> wrote: > Zvika: > Doing a full flash doesn't work for you, this is what I been doing. > Try to use flashrom from linux if you want to do the full flash (may be it > will work). > > An external programmer would be the optimal choice. > > Did you tried what Mariusz said? > Jose. > > > > ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ > On Thursday, October 4, 2018 6:20 PM, Zvi Vered <[email protected]> > wrote: > > Hi Mariusz, Jose, All, > > Mariusz - Thank you very much for the solution. > Jose - You wrote "I have never done this way...". > Can you please suggest a better alternative ? > > Thank you, > Zvika > > > On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot < > [email protected]> wrote: > >> Hi Jose, >> >> In your case set: >> ROM chip size = 8MB (your case) >> CBFS_SIZE <= 5MB (your specific case) >> >> This will build 8M file. After that just cut last 5M of this 8M file >> (using any hexeditor) or use something like below from command line: >> >> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3 >> >> (before doing that double check if original vendor`s rom file size is >> 5242880 bytes long) >> >> Mariusz >> >> >> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze: >> >> You can do that but I have never done this way and I cannot help you with >> that. >> >> Someone else can advise on this? >> >> ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ >> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered <[email protected]> >> <[email protected]> wrote: >> >> Hi Jose, All, >> >> Highly appreciate your answers. >> It seems the vital information in your replies are not documented. >> >> The original vendor's rom file size is 5MB. >> Do you think I can create a 5MB coreboot.rom ? >> >> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom >> file like the original one. For any other file size, AfuEfix64 fails. >> >> Thank you, >> Zvika >> >> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo <[email protected]> >> wrote: >> >>> Zvika: >>> >>> There are 2 ways to build coreboot: (choose one).... >>> 1.- Including IFD, TXE, GBE etc.... inside coreboot CBFS. >>> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash >>> and just rewrite coreboot on top of the BIOS block. >>> >>> Your original computer Firmware = Intel FW + "BIOS" >>> >>> Intel FW = IFD +PD+ME/TXE+GBE >>> BIOS=AMI-Phoenix etc... >>> >>> IFD=Intel Firmware Descriptor Table. >>> PD=Parameters >>> ME=Management Engine (For "Core" kind of processors). >>> TXE=Trusted Execution Engine (For "Atom" kind of processors). >>> GBE=Network card firmware. >>> >>> Zvika said: >>> "After creating coreboot.rom should I always use the original BIOS with >>> ifdtool to convert rom to bin ?" >>> Answer: >>> No, there are other methods and tools that can do the merge.... (ifdtool >>> and Intel's FIT are working fine for me) >>> >>> After the creation of the coreboot build you have 2 ways of doing the >>> flashing for your case: (with fpt). >>> 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or >>> have unknown firmware. >>> Use IFDTool in this case to inject coreboot to Intel FW..... then >>> flash it with fpt . >>> 2.- Flash only the BIOS block (5MB your specific case) in this case ask >>> someone else how to do it with fpt.... >>> >>> I hope this answered your questions. >>> Jose.. >>> >>> ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ >>> On Saturday, September 29, 2018 12:24 AM, Zvi Vered <[email protected]> >>> wrote: >>> >>> Hi Jose, >>> >>> You wrote: >>> "My recommended approach is using the original Intel FW with already >>> included the FD, TXE". >>> >>> What is "original intel FW" ? >>> What is FD, TXE ? >>> >>> After creating coreboot.rom should I always use the original BIOS with >>> ifdtool to convert rom to bin ? >>> >>> Thank you, >>> Zvika >>> >>> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo <[email protected]> >>> wrote: >>> >>>> You are right Nico, >>>> >>>> I just forgot the troubles this caused me. >>>> I am sorry Vika... My mistake. >>>> >>>> I can confirm with Nico: >>>> ROM chip size = 8MB (your case) >>>> CBFS_SIZE = 2 to 5MB (your specific case) >>>> >>>> My recommended approach is using the original Intel FW with already >>>> included the FD, TXE. >>>> >>>> I never tested adding regions to coreboot but you can try. >>>> >>>> To have better chances of success you should be dumping hardware >>>> settings booting with your original "BIOS" (look for the attached file). >>>> >>>> Check if the system is "Memory down"or/and ECC because it will be >>>> needed to edit FSP (if using it). >>>> Dump memory settings with the following commands: >>>> >>>> sudo dnf install i2c-tools-perl >>>> sudo modprobe eeprom >>>> decode-dimms >>>> >>>> If you have not done this already there is still a long way to go. >>>> Don't get intimidated, just do it, if you have questions just ask.... I >>>> will try to help >>>> >>>> Good luck, >>>> Jose. >>>> >>>> >>>> ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ >>>> On Wednesday, September 26, 2018 6:28 PM, Nico Huber <[email protected]> >>>> wrote: >>>> >>>> > Hi, >>>> > >>>> > On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote: >>>> > >>>> > > No, don't change it, you change the size of coreboot only if during >>>> the >>>> > > building process "make" complain that there is not enough space but >>>> in >>>> > > your case your build was already successful leave it like that. >>>> > >>>> > this advice seems very weird to me. I'm not experienced with Bay >>>> Trail. >>>> > But unless there is a bug in the Bay Trail code, you should always set >>>> > the correct ROM_SIZE (to the full flash chip size). Otherwise you may >>>> > introduce bugs in code that relies on this setting (e.g. saving the >>>> > MRC cache might fail and so would S3 resume). >>>> > >>>> > CBFS_SIZE however is the setting to adjust according to your needs. It >>>> > should be at most the size of the BIOS region. >>>> > >>>> > > In the rare circumstance that more space is required you can >>>> increase >>>> > > coreboot size to 4MB and istill will fit into your system 5MB of >>>> space >>>> > > available. >>>> > > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and >>>> save >>>> > > as BYT_orig.bin.new that you can flash to your system. >>>> > >>>> > I assume this doesn't work oob if you set ROM_SIZE correctly. But it >>>> is >>>> > unnecessary to craft a single file by hand. You can either only flash >>>> > the BIOS region (recommended) or add the other regions in coreboot's >>>> > config (HAVE_{IFD,ME,GBE}_BIN). >>>> > >>>> > Nico >>>> >>>> >>>> >>> >> >> >> -- >> coreboot mailing list: [email protected] >> https://mail.coreboot.org/mailman/listinfo/coreboot >> > >
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